7477 datasheet(32/48 Pages) RENESAS

32 / 48 page

MITSUBISHI MICROCOMPUTERS

7477/ 7478 GROUP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

Fig. 23 Example of ceramic resonator circuit (7477 group)

Fig. 24 Example of ceramic resonator circuit (7478 group)

Fig. 25 External clock input circuit (7477 group)

Fig. 26 External clock input circuit (7478 group)

CLOCK GENERATING CIRCUIT

The 7477 group has one internal clock generating circuit and 7478

group has two internal clock generating circuits.

Figure 27 shows a block diagram of the clock generating circuit.

Normally, the frequency applied to the clock input pin XIN divided

by two is used as the internal clock

φ. Bit 7 of CPU mode register

can be used to switch the internal clock

φ to 1/2 the frequency ap-

plied to the clock input pin XCIN in the 7478 group.

Figure 23, 24 show a circuit example using a ceramic resonator

(or quartz cr ystal oscillator). Use the manufacturer’s recom-

mended values for constants such as capacitance which will differ

depending on each oscillator. When using an external clock sig-

nal, input from the XIN(XCIN) pin and leave the XOUT(XCOUT) pin

open. A circuit example is shown in Figure 25, 26.

The 7477/7478 group has two low power dissipation modes; stop

and wait. The microcomputer enters a stop mode when the STP

instruction is executed. The oscillator (both XIN clock and XCIN

clock) stops with the internal clock

φ held at “H” level. In this case

timer 3 and timer 4 are forcibly connected and FF16 is automati-

cally set in timer 3 and 0716 in timer 4.

Although oscillation is restarted when an external interrupt is ac-

cepted, the internal clock

φ remains in the “H” state until timer 4

overflows. In other words, the internal clock

φ is not supplied until

timer 4 overflows. This is because when a ceramic or similar other

oscillator is used, a finite time is required until stable oscillation is

obtained after restart.

The microcomputer enters an wait mode when the WIT instruction

is executed. The internal clock

φ stops at “H” level, but the oscilla-

tor does not stop.

φ is re-supplied (wait mode release) when the

microcomputer receives an interrupt.

Instructions can be executed immediately because the oscillator is

not stopped. The interrupt enable bit of the interrupt used to reset

the wait mode or the stop mode must be set to “1” before execut-

ing the WIT or the STP instruction.

Low power dissipation operation is also achieved when the XIN

clock is stopped and the internal clock

φ is generated from the

XCIN clock (30

µA typ. at f(XCIN) = 32kHz). This operation is only

7478 group. XIN clock oscillation is stopped when the bit 6 of CPU

mode register is set and restarted when it is cleared. However, the

wait time until the oscillation stabilizes must be generated with a

program when restarting. Figure 29 shows the transition of states

for the system clock.

XIN

XOUT

COUT

CIN

M37477M4-XXXSP/FP

XIN

XOUT

CCOUT

CCIN

M37478M4-XXXSP/FP

XCIN

XCOUT

COUT

CIN

XIN

XOUT

M37477M4-XXXSP/FP

External oscillation circuit

Open

VCC

VSS

XIN

XOUT

M37478M4-XXXSP/FP

XCIN XCOUT

Open

External oscillation

circuit

External oscillation circuit

or external pulse

Open

VCC

VSS

VCC

VSS

7477 Datasheet(PDF) 32 Page - Renesas Technology Corp

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