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7542 Datasheet(PDF) 91 Page - Renesas Technology Corp |
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7542 Datasheet(HTML) 91 Page - Renesas Technology Corp |
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91 / 122 page ![]() 7542 Group Rev.3.03 Jul 11, 2008 Page 91 of 117 REJ03B0006-0303 Pin name Signal name I/O VCC,VSS Power supply I CNVSS CNVSS I RESET Reset input I XIN Clock input I XOUT Clock output O VREF Reference voltage input I P00–P03 I/O port P0 I/O P04 RxD input I P05 TxD output O P06 SCLK input I P07 BUSY output O P10–P14 I/O port P1 I/O P20–P27 I/O port P2 I/O P30, P31, P33–P36 I/O port P3 I/O P32 CE input I P37 RP input I I (2) Standard serial I/O mode 2 Table 14 Description of pin function (standard serial I/O mode 2) Function Apply 2.7 to 5.5 V to the Vcc pin and 0 V to the Vss pin. After input of port is set, input “H” level. Reset input pin. System operates when RESET pin is set to “H” level after CNVss pin is set to “H” level. Connect an oscillation circuit between the XIN and XOUT pins. As for the connection method, refer to the “clock generating circuit”. (When system operates only by the on-chip oscillator, an external circuit is not required.) Apply reference voltage of A/D to this pin. Input “L” or “H” level, or keep open. Serial data input pin. Serial data output pin. Input “L” level. BUSY signal output pin. Input “L” or “H” level, or keep open. Input “L” or “H” level, or keep open. Input “L” or “H” level, or keep open. Input “H” level. Input “L” level. |
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