7560 datasheet(39/71 Pages) RENESAS

39 / 71 page

Rev.1.02

Jul 31, 2003

page 39 of 69

7560 Group (A version)

Fig. 40 A-D converter block diagram

Fig. 39 Read of A-D conversion register

•10-bit reading

(Read address 003516, then 001416)

A-D conversion high-order register

(ADH: Address 003516)

A-D conversion low-order register

(ADL: Address 001416)

b7 b6 b5b4b3 b2

b9b8b7 b6 b5 b4 b3 b2

(high-order)

(low-order)

Note : Bits 0 to 5 of address 001416 become “0” at reading.

b1 b0

•8-bit reading

(Read only address 003516)

A-D conversion high-order register

(ADH: Address 003516)

Conversion mode selection bit

0 : 10-bit A-D mode

1 : 8-bit A-D mode

Comparato

A-D control

circuit

ADT/A-D

interrupt

request

AVSS

VRE

P60/SIN2/AN0

Data

bus

A-D control register

A-D conversion

high-order register

Resistor

ladder

P67/

AN7

P66/

AN6

P65/

AN5

P64/

AN4

P63/SCLK22/AN3

P62/SCLK21/AN2

P61/SOUT2/AN1

P57/ADT/DA2

(Address 003516)

A-D conversion

low-order register

(Address 001416)

7560 Datasheet(PDF) 39 Page - Renesas Technology Corp

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