M61880FP

Rev.1.0, Sep.19.2003, page 5 of 20

SW1

SW2

Tr1

S/H

ENB

Comparator

Reference voltage input

RM resistance generation voltage

Sample-and-hold control input

Control circuit

Output (CH pin)

External capacitance

Discharging constant-

current source

Charging constant-

current source

Conceptual Diagram of Sample-and-Hold Circuit

Operation Function Table

Input

Switch State

ENB

ENB

ENB

ENB

S

SS

S/H

DATA

DATA

DATA

DATA

VM, Vr

SW1

SW2

Tr1

Output (CH Pin)

H

X

X

X

OFF

OFF

ON

Fixed at “L”

L

H

X

X

OFF

OFF

OFF

High-impedance state (hold)

H

X

OFF

OFF

OFF

High-impedance state (hold)

VM < Vr

ON

OFF

OFF

Current source (sample)

L

L

L

VM > Vr

OFF

ON

OFF

Current sink (sample)

X: Don’t Care

(2) APC timing chart

An example of a timing chart of APC operation by means of the sample-and-hold control signals is shown below.

In this example, a case is shown in which the direction of the CH pin leakage current in the hold state is assumed to be

the direction of flow to the M61880 (forward direction).

Power supply

Sample

Sample

Sample

Hold

Hold

Hold

Laser drive

current

ENB input

DATA input

S/H input

Example of Sample-and-Hold Type APC Circuit Operation Timing Chart