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R8C2K Datasheet(PDF) 58 Page - Renesas Technology Corp |
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R8C2K Datasheet(HTML) 58 Page - Renesas Technology Corp |
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58 / 471 page ![]() R8C/2K Group, R8C/2L Group 6. Voltage Detection Circuit Rev.1.10 Dec 21, 2007 Page 41 of 450 REJ09B0406-0110 6.3 Voltage Monitor 1 Interrupt and Voltage Monitor 1 Reset Table 6.3 lists the Procedure for Setting Bits Associated with Voltage Monitor 1 Interrupt and Reset. Figure 6.10 shows an Example of Voltage Monitor 1 Interrupt and Voltage Monitor 1 Reset Operation. To use the voltage monitor 1 interrupt or voltage monitor 1 reset to exit stop mode, set the VW1C1 bit in the VW1C register to 1 (digital filter disabled). NOTES: 1. Set the VW1C7 bit to 1 (when VCC reaches Vdet1 or below) for the voltage monitor 1 reset. 2. When the VW1C0 bit is set to 0, steps 3, 4, and 5 can be executed simultaneously (with 1 instruction). Table 6.3 Procedure for Setting Bits Associated with Voltage Monitor 1 Interrupt and Reset Step When Using Digital Filter When Not Using Digital Filter Voltage Monitor 1 Interrupt Voltage Monitor 1 Reset Voltage Monitor 1 Interrupt Voltage Monitor 1 Reset 1 Set the VCA26 bit in the VCA2 register to 1 (voltage detection 1 circuit enabled) 2 Wait for td(E-A) 3 Select the sampling clock of the digital filter by the VW1F0 to VW1F1 bits in the VW1C register Select the timing of the interrupt and reset request by the VW1C7 bit in the VW1C register(1) 4(2) Set the VW1C1 bit in the VW1C register to 0 (digital filter enabled) Set the VW1C1 bit in the VW1C register to 1 (digital filter disabled) 5(2) Set the VW1C6 bit in the VW1C register to 0 (voltage monitor 1 interrupt mode) Set the VW1C6 bit in the VW1C register to 1 (voltage monitor 1 reset mode) Set the VW1C6 bit in the VW1C register to 0 (voltage monitor 1 interrupt mode) Set the VW1C6 bit in the VW1C register to 1 (voltage monitor 1 reset mode) 6 Set the VW1C2 bit in the VW1C register to 0 (passing of Vdet1 is not detected) 7 Set the CM14 bit in the CM1 register to 0 (low-speed on-chip oscillator on) − 8 Wait for 4 cycles of the sampling clock of the digital filter − (No wait time required) 9 Set the VW1C0 bit in the VW1C register to 1 (voltage monitor 1 interrupt/reset enabled) |
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