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6

Document Number: 70102

S-60004–Rev. F, 16-Jan-06

Vishay Siliconix

DG2011

TEST CIRCUITS

Figure 1. Switching Time

Switch

Input

V+

IN

NO or NC

35 pF

COM

Logic

Input

300

Ω

GND

V+

50%

0 V

0 V

Logic

Input

Switch

Output

Logic "1" = Switch On

Logic input waveforms inverted for switches that have

the opposite logic sense.

0 V

Switch Output

V

R

L

R

+ 3 V

Figure 2. Break-Before-Make Interval

NC

NO

0 V

3 V

0 V

Logic

Input

Switch

Output

90%

IN

COM

V+

GND

V+

35 pF

300

Ω

Figure 3. Charge Injection

Off

On

On

IN

Q =

COM

NC or NO

3 V

IN

GND

V+

V+

IN depends on switch configuration: input polarity

determined by sense of switch.

+