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R5F36506DFB Datasheet(PDF) 96 Page - Renesas Technology Corp |
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R5F36506DFB Datasheet(HTML) 96 Page - Renesas Technology Corp |
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96 / 829 page ![]() REJ09B0484-0030 Rev.0.30 Sep 09, 2008 Page 61 of 791 Under development Preliminary Specification This is a preliminary specification and is subject to change. M16C/65 Group 6. Resets 6.2.2 Reset Source Determine Register (RSTFR) Table 6.4 Bit Values in the RSTFR Register after Reset Reset Bits in the RSTFR Register OSDR LVD2R LVD1R WDR SWR HWR CWR Hardware reset No change 0 0 0 0 1 No change Power-on reset 0 0 0 0 0 0 0 Voltage monitor 0 reset 0 0 0 0 0 0 0 Voltage monitor 1 reset 0 0 1 0 0 0 No change Voltage monitor 2 reset 0 1 0 0 0 0 No change Oscillation stop detection reset 1 0 0 0 0 0 No change Watchdog timer reset 0 0 0 1 0 0 No change Software reset 0 0 0 0 1 0 No change b7 b6 b5 b4 b1 b2 b3 Reset Source Determine Register Symbol RSTFR Address 0018h Bit Symbol Bit Name RW CWR After Reset See Table 6.4 RW b0 Function HWR SWR Software reset detection flag 0 : Not detected 1 : Detected RO RO Cold start-up/warm start-up discrimination flag 0 : Cold start 1 : Warm start Hardware reset detection flag 0 : Not detected 1 : Detected WDR Watchdog timer reset detection flag 0 : Not detected 1 : Detected RO LVD1R Voltage monitor 1 reset detection flag 0 : Not detected 1 : Detected RO LVD2R Voltage monitor 2 reset detection flag 0 : Not detected 1 : Detected RO OSDR Oscillation stop detection reset detection flag 0 : Not detected 1 : Detected RW — (b7) Reserved bit If necessary, set to 0. Read as undefined value. RW |
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