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HD6432351 Datasheet(PDF) 337 Page - Renesas Technology Corp

Part # HD6432351
Description  16-Bit Single-Chip Microcomputer
PDF  1025 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD6432351 Datasheet(HTML) 337 Page - Renesas Technology Corp

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Section 8 Data Transfer Controller (DTC)
Rev. 3.00 Sep 15, 2006 page 303 of 988
REJ09B0330-0300
The DTC transfer mode can be normal mode, repeat mode, or block transfer mode.
The 24-bit SAR designates the DTC transfer source address and the 24-bit DAR designates the
transfer destination address. After each transfer, SAR and DAR are independently incremented,
decremented, or left fixed.
Table 8.2 outlines the functions of the DTC.
Table 8.2
DTC Functions
Address Registers
Transfer Mode
Activation Source
Transfer
Source
Transfer
Destination
• Normal mode
 One transfer request transfers one byte
or one word
 Memory addresses are incremented or
decremented by 1 or 2
 Up to 65,536 transfers possible
• Repeat mode
 One transfer request transfers one byte
or one word
 Memory addresses are incremented or
decremented by 1 or 2
 After the specified number of transfers
(1 to 256), the initial state resumes and
operation continues
• Block transfer mode
 One transfer request transfers a block
of the specified size
 Block size is from 1 to 256 bytes or
words
 Up to 65,536 transfers possible
 A block area can be designated at
either the source or destination
• IRQ
• TPU TGI
• SCI TXI or RXI
• A/D converter ADI
• DMAC DEND
• Software
24 bits
24 bits



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