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HD6432351 Datasheet(PDF) 1014 Page - Renesas Technology Corp |
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HD6432351 Datasheet(HTML) 1014 Page - Renesas Technology Corp |
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1014 / 1025 page ![]() Appendix D Pin States Rev. 3.00 Sep 15, 2006 page 980 of 988 REJ09B0330-0300 D.2 Port States in Each Mode [H8S/2350] Table D.2 I/O Port States in Each Processing State (H8S/2350) Port Name Pin Name MCU Operating Mode Power- On Reset Manual Reset Hardware Standby Mode Software Standby Mode Bus Release State Program Execution State Sleep Mode Port 1 1, 4, 5 T kept T kept kept I/O port Port 2 1, 4, 5 T kept T kept kept I/O port Port 3 1, 4, 5 T kept T kept kept I/O port Port 4 1, 4, 5 T T T T T Input port Port 5 1, 4, 5 T kept T kept kept I/O port P65 to P62 1, 4, 5 T kept T kept kept I/O port 1 T kept T kept kept I/O port P67/CS7 P66/CS6 P61/CS5 P60/CS4 4, 5 T kept T [DDR · OPE = 0] T [DDR · OPE = 1] H T [DDR = 0] Input port [DDR = 1] CS7 to CS4 Port A 1 T kept T kept kept I/O port 4, 5 L kept T [OPE = 0] T [OPE = 1] kept T Address output Port B 1, 4, 5 L kept T [OPE = 0] T [OPE = 1] kept T Address output Port C 1, 4, 5 L kept T [OPE = 0] T [OPE = 1] kept T Address output Port D 1, 4, 5 T T* T T T Data bus Port E 1, 4, 5 8-bit bus T kept T kept kept I/O port 16-bit bus T T* T T T Data bus PF7/ φ 1, 4, 5 Clock output [DDR = 0] T [DDR = 1] Clock output T [DDR = 0] Input port [DDR = 1] H [DDR = 0] Input port [DDR = 1] Clock output [DDR = 0] Input port [DDR = 1] Clock output |
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