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HD6432351 Datasheet(PDF) 296 Page - Renesas Technology Corp |
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HD6432351 Datasheet(HTML) 296 Page - Renesas Technology Corp |
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296 / 1025 page ![]() Section 7 DMA Controller (DMAC) Rev. 3.00 Sep 15, 2006 page 262 of 988 REJ09B0330-0300 External memory External device (Read) (Write) RD HWR, LWR A23 to A0 H8S/2350 Group D15 to D0 (high impedance) DACK Address bus Figure 7.17 Data Bus in Single Address Mode When using the DMAC for single address mode reading, transfer is performed from external memory to the external device, and the DACK pin functions as a write strobe for the external device. When using the DMAC for single address mode writing, transfer is performed from the external device to external memory, and the DACK pin functions as a write strobe for the external device. Since there is no directional control for the external device, one or other of the above single directions should be used. Bus cycles in single address mode are in accordance with the settings of the bus controller for the external memory area. On the external device side, DACK is output in synchronization with the address strobe. For details of bus cycles, see section 7.5.11, DMAC Bus Cycles (Single Address Mode). Do not specify internal space for transfer addresses in single address mode. |
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