HD6432351 datasheet(299/1025 Pages) RENESAS

Part #	HD6432351

Description	16-Bit Single-Chip Microcomputer

PDF	1025 Pages

Scroll/Zoom	100%

Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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299 / 1025 page

Section 7 DMA Controller (DMAC)

Rev. 3.00 Sep 15, 2006 page 265 of 988

REJ09B0330-0300

Full Address Mode (Cycle Steal Mode)

Figure 7.20 shows a transfer example in which

TEND output is enabled and word-size full address

mode transfer (cycle steal mode) is performed from external 16-bit, 2-state access space to

external 16-bit, 2-state access space.

DMA

read

Address bus

LWR

TEND

HWR

Bus release

Last transfer

cycle

DMA

write

DMA

read

DMA

write

DMA

read

DMA

write

DMA

dead

Bus release

Bus

release

Bus

release

Figure 7.20 Example of Full Address Mode (Cycle Steal) Transfer

A one-byte or one-word transfer is performed, and after the transfer the bus is released. While the

bus is released one bus cycle is inserted by the CPU or DTC.

In the transfer end cycle (the cycle in which the transfer counter reaches 0), a one-state DMA dead

cycle is inserted after the DMA write cycle.

HD6432351 Datasheet(PDF) 299 Page - Renesas Technology Corp