HD6432137SW datasheet(11/1061 Pages) RENESAS

11 / 1061 page

Rev. 4.00 Jun 06, 2006 page xi of liv

Item

Page

Revision (See Manual for Details)

25.2.7 Usage Note

Figure 25.3 Connection

of External Capacitor

(Mask ROM Type

Incorporating Step-Down

Circuit and Product Not

Incorporating Step-Down

Circuit)

732

Description amended

HD6432138S, HD6432138SW, HD6432137S,

HD6432137SW, HD6432134S, HD6432133S, HD64F2138A,

HD64F2134A

25.3.2 DC

Characteristics

Table 25.16 DC

Characteristics (1)

735

Table 25.16 (1) amended

Item

Symbol

Min

Typ

Max

Unit

Test

Conditions

CC –0.5

——

OH = –200 µA

All output pins

(except P97, and

P52*

4)*5

3.5

——

OH = –1 mA

Output high

voltage

P97, P52*

2.0

——

= –200 µA,

= 4.5 to

5.5 V

736

Note

*4 amended

Note: 4. P52/SCK0/SCL0 and P97/SDA0 are NMOS push-pull

outputs in H8S/2138. ... P52/SCK0 and P97 (ICE = 0) high

levels are driven by NMOS in H8S/2138.

Table 25.16 DC

Characteristics (2)

738

Table 25.16 (2) amended

Item

Symbol

Min

Typ

Max

Unit

Test

Conditions

CC –0.5

——

OH = –200 µA

Output high

voltage

All output pins

(except P97, and

P52*

4)*5

3.5

——

OH = –1 mA,

CC=

4.5 V to 5.5 V

3.0

——

OH = –1 mA,

CC < 4.5 V

P97, P52*

1.5

——

OH = –200 µA,

= 4.0 to

5.5 V

739

Note

*4 amended

Note: 4. P52/SCK0/SCL0 and P97/SDA0 are NMOS push-pull

outputs in H8S/2138. ... P52/SCK0 and P97 (ICE = 0) high

levels are driven by NMOS in H8S/2138.

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