HD6432142 datasheet(483/1177 Pages) RENESAS

483 / 1177 page

Section 15 Serial Communication Interface (SCI, IrDA)

Rev. 4.00 Sep 27, 2006 page 439 of 1130

REJ09B0327-0400

Bit 3—Parity Error (PER): Indicates that a parity error occurred during reception using parity

addition in asynchronous mode, causing abnormal termination.

Bit 3

PER

Description

[Clearing condition]

(Initial value)*

When 0 is written in PER after reading PER = 1

[Setting condition]

When, in reception, the number of 1 bits in the receive data plus the parity bit does not

match the parity setting (even or odd) specified by the O/

E bit in SMR*2

Notes: 1. The PER flag is not affected and retains its previous state when the RE bit in SCR is

cleared to 0.

2. If a parity error occurs, the receive data is transferred to RDR but the RDRF flag is not

set. Also, subsequent serial reception cannot be continued while the PER flag is set to

1. In synchronous mode, serial transmission cannot be continued, either.

Bit 2—Transmit End (TEND): Indicates that there is no valid data in TDR when the last bit of

the transmit character is sent, and transmission has been ended.

The TEND flag is read-only and cannot be modified.

Bit 2

TEND

Description

[Clearing conditions]

• When 0 is written in TDRE after reading TDRE = 1

• When the DTC is activated by a TXI interrupt and writes data to TDR

[Setting conditions]

(Initial value)

• When the TE bit in SCR is 0

• When TDRE = 1 at transmission of the last bit of a 1-byte serial transmit character

HD6432142 Datasheet(PDF) 483 Page - Renesas Technology Corp