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HD6432142 Datasheet(PDF) 90 Page - Renesas Technology Corp |
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HD6432142 Datasheet(HTML) 90 Page - Renesas Technology Corp |
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90 / 1177 page ![]() Section 2 CPU Rev. 4.00 Sep 27, 2006 page 46 of 1130 REJ09B0327-0400 Free area Stack area SP (ER7) Figure 2.9 Stack 2.4.3 Control Registers The control registers are the 24-bit program counter (PC), 8-bit extended control register (EXR), and 8-bit condition-code register (CCR). (1) Program Counter (PC) This 24-bit counter indicates the address of the next instruction the CPU will execute. The length of all CPU instructions is 2 bytes (one word), so the least significant PC bit is ignored. (When an instruction is fetched, the least significant PC bit is regarded as 0.) (2) Extended Control Register (EXR) An 8-bit register. In this LSI, this register does not affect operation. Bit 7—Trace Bit (T): This bit is reserved. In this LSI, this bit does not affect operation. Bits 6 to 3—Reserved: These bits are reserved. They are always read as 1. Bits 2 to 0—Interrupt Mask Bits (I2 to I0): These bits are reserved. In this LSI, these bits do not affect operation. |
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