HD6432142 datasheet(166/1177 Pages) RENESAS

166 / 1177 page

Section 5 Interrupt Controller

Rev. 4.00 Sep 27, 2006 page 122 of 1130

REJ09B0327-0400

5.2.6

Keyboard Matrix Interrupt Mask Register (KMIMR)

KMIMR7

R/W

KMIMR6

R/W

KMIMR5

R/W

KMIMR4

R/W

KMIMR3

R/W

KMIMR0

R/W

KMIMR2

R/W

KMIMR1

R/W

Bit

Initial value

Read/Write

KMIMR is an 8-bit readable/writable register that performs mask control for the keyboard matrix

interrupt inputs (pins

KIN7 to KIN0). To enable key-sense input interrupts from multiple pin

inputs in keyboard matrix scanning/sensing, clear the corresponding mask bits to 0.

KMIMR is initialized to H'BF by a reset and in hardware standby mode and only

IRQ6 (KIN6)

input is enabled.

Bits 7 to 0—Keyboard Matrix Interrupt Mask (KMIMR7 to KMIMR0): These bits control

key-sense input interrupt requests (KIN7 to KIN0).

Bits 7 to 0

KMIMR7 to

KMIMR0

Description

Key-sense input interrupt requests enabled

Key-sense input interrupt requests disabled (Initial value)*

Note:

However, the initial value of KMIMR6 is 0 because the KMIMR6 bit controls both

IRQ6

interrupt request masking and key-sense input enabling.

5.2.7

Keyboard Matrix Interrupt Mask Register (KMIMRA)

KMIMR15

R/W

KMIMR14

R/W

KMIMR13

R/W

KMIMR12

R/W

KMIMR11

R/W

KMIMR8

R/W

KMIMR10

R/W

KMIMR9

R/W

Bit

Initial value

Read/Write

KMIMRA is an 8-bit readable/writable register that performs mask control for the keyboard

matrix interrupt inputs (pins

KIN15 to KIN8). To enable key-sense input interrupts from multiple

pin inputs in keyboard matrix scanning/sensing, clear the corresponding mask bits to 0.

KMIMRA is initialized to H'FF by a reset and in hardware standby mode.

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