HD6432142 datasheet(295/1177 Pages) RENESAS

295 / 1177 page

Section 8 I/O Ports

Rev. 4.00 Sep 27, 2006 page 251 of 1130

REJ09B0327-0400

Selection Method and Pin Functions

P64/FTIC/

KIN4/

CIN4/CLAMPO

The pin function is switched as shown below according to the combination of

bit CLOE in TCONRO of the timer connection function and bit P64DDR.

CLOE

P64DDR

—

Pin function

P64

input pin

P64

output pin

CLAMPO

output pin

FTIC input pin,

KIN4 input pin, CIN4 input pin

This pin can always be used as the FTIC,

KIN4, or CIN4 input pin.

P63DDR

P63/FTIB/

KIN3/

CIN3/VFBACKI

Pin function

P63 input pin

P63 output pin

FTIB input pin, VFBACKI input pin,

KIN3 input pin,

CIN3 input pin

This pin can always be used as the FTIB,

KIN3, CIN3, or VFBACKI input pin.

P62DDR

Pin function

P62 input pin

P62 output pin

P62/FTIA/TMIY/

KIN2/CIN2/

VSYNCI

FTIA input pin, VSYNCI input pin, TMIY input pin,

KIN2 input pin, CIN2 input pin

This pin can always be used as the FTIA, TMIY,

KIN2, CIN2, or VSYNCI input

pin.

P61/FTOA/

KIN1/

CIN1/VSYNCO

The pin function is switched as shown below according to the combination of

bit OEA in TOCR of the FRT, bit VOE in TCONRO of the timer connection

function, and bit P61DDR.

VOE

OEA

P61DDR

——

Pin function

P61

input pin

P61

output pin

FTOA

output pin

VSYNCO

output pin

KIN1 input pin, CIN1 input pin

When this pin is used as the VSYNCO pin, bit OEA in TOCR of the FRT must

be cleared to 0.

This pin can always be used as the

KIN1 or CIN1 input pin.

HD6432142 Datasheet(PDF) 295 Page - Renesas Technology Corp

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