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HD6432142 Datasheet(PDF) 300 Page - Renesas Technology Corp |
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HD6432142 Datasheet(HTML) 300 Page - Renesas Technology Corp |
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300 / 1177 page ![]() Section 8 I/O Ports Rev. 4.00 Sep 27, 2006 page 256 of 1130 REJ09B0327-0400 Port 8 Data Direction Register (P8DDR) Bit 765 432 10 — P86DDR P85DDR P84DDR P83DDR P82DDR P81DDR P80DDR Initial value 100 000 00 Read/Write — WW WWW WW P8DDR is a 7-bit write-only register, the individual bits of which specify input or output for the pins of port 8. P8DDR has the same address as PBPIN, and if read, the port B state will be returned. Setting a P8DDR bit to 1 makes the corresponding port 8 pin an output pin, while clearing the bit to 0 makes the pin an input pin. P8DDR is initialized to H'80 by a reset and in hardware standby mode. It retains its prior state in software standby mode. Port 8 Data Register (P8DR) Bit 765 432 10 — P86DR P85DR P84DR P83DR P82DR P81DR P80DR Initial value 100 000 00 Read/Write — R/W R/W R/W R/W R/W R/W R/W P8DR is a 7-bit readable/writable register that stores output data for the port 8 pins (P86 to P80). If a port 8 read is performed while P8DDR bits are set to 1, the P8DR values are read directly, regardless of the actual pin states. If a port 8 read is performed while P8DDR bits are cleared to 0, the pin states are read. P8DR is initialized to H'80 by a reset and in hardware standby mode. It retains its prior state in software standby mode. 8.9.3 Pin Functions Port 8 pins also function as SCI1 I/O pins (TxD1, RxD1, SCK1), the IIC1 I/O pin (SCL1), HIF I/O pins ( CS2, GA20, HA0, HIFSD), and external interrupt input pins (IRQ5 to IRQ3). The port 8 pin functions are shown in table 8.19. |
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