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R5F21183SP Datasheet(PDF) 73 Page - Renesas Technology Corp |
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R5F21183SP Datasheet(HTML) 73 Page - Renesas Technology Corp |
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73 / 257 page ![]() R8C/18 Group, R8C/19 Group 10. Clock Generation Circuit Rev.1.30 Apr 14, 2006 Page 58 of 233 REJ09B0222-0130 Figure 10.5 HRA0 Register High-Speed On-Chip Oscillator Control Register 0 (1) Symbol Address After Reset HRA0 0020h 00h Bit Symbol Bit Name Function RW NOTES: 1. 2. 3. b7 b6 b5 b4 b3 b2 b1 b0 0000 00 HRA00 RW HRA01 RW High-speed on-chip oscillator enable bit 0 : High-speed on-chip oscillator off 1 : High-speed on-chip oscillator on High-speed on-chip oscillator select bit(2) 0 : Selects low -speed on-chip oscillator.(3) 1 : Selects high-speed on-chip oscillator. Change the HRA01 bit under the follow ing conditions. • HRA00 = 1 (high-speed on-chip oscillation) • The CM14 bit in the CM1 register = 0 (low -speed on-chip oscillator on) When setting the HRA01 bit to 0 (low -speed on-chip oscillator selected), do not set the HRA00 bit to 0 (high-speed on-chip oscillator off) at the same time. Set the HRA00 bit to 0 after setting the HRA01 bit to 0. — (b7-b2) Reserved bits Set to 0. RW Set the PRC0 bit in the PRCR register to 1 (w rite enable) before rew riting the HRA0 register. |
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