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HD6433636SW Datasheet(PDF) 269 Page - Renesas Technology Corp |
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HD6433636SW Datasheet(HTML) 269 Page - Renesas Technology Corp |
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269 / 418 page ![]() 255 (1) Transmit/Receive Format: Figure 10.12 shows the general communication data format for synchronous communication. Note: At high level except during continuous transmit/receive. Serial data Serial clock One unit of communication data (character or frame) Bit 0 Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7 Don't care Don't care * * * LSB MSB 8 bits Figure 10.12 Data Format in Synchronous Communication Mode In synchronous communication, data is output to the communication line during the period from one falling edge of the synchronous clock to the next falling edge. Data fixing is guaranteed at the rising edge of the synchronous clock. One character of data starts from the LSB and ends with the MSB. The communication line retains the MSB state after the MSB is output. In synchronous receive mode, SCI3 latches receive data in synchronization with the rising edge of the serial clock. The transmit/receive format is fixed at 8-bit data. No parity bit or multiprocessor bit is added in this mode. (2) Clock: Either an internal clock from the built-in baud rate generator is used, or an external clock is input at pin SCK 3. The choice of clock sources is designated by bit COM in SMR and bits CKE1 and CKE0 in serial control register 3 (SCR3). See table 10.12 for details on selecting the clock source. When operation is based on an internal clock, a serial clock is output at pin SCK 3. Eight clock pulses are output per character of transmit/receive data. When no transmit or receive operation is being performed, the pin is held at the high level. (3) Data Transmit/Receive Operations SCI3 Initialization: Before data is sent or received, bits TE and RE in serial control register 3 (SCR3) must be cleared to 0, after which initialization can be performed using the procedure. |
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