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HD6433636SW Datasheet(PDF) 300 Page - Renesas Technology Corp |
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HD6433636SW Datasheet(HTML) 300 Page - Renesas Technology Corp |
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300 / 418 page  286 12.2 Register Descriptions 12.2.1 A/D Result Register (ADRR) Bit 76543210 ADR7 ADR6 ADR5 ADR4 ADR3 ADR2 ADR1 ADR0 Initial value Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Read/Write RRRRRRRR The A/D result register (ADRR) is an 8-bit read-only register for holding the results of analog-to- digital conversion. ADRR can be read by the CPU at any time, but the ADRR values during A/D conversion are undefined. After A/D conversion is complete, the conversion result is stored in ADRR as 8-bit data; this data is held in ADRR until the next conversion operation starts. ADRR is not cleared on reset. 12.2.2 A/D Mode Register (AMR) Bit 76543210 CKS TRGE CKS1 — CH3 CH2 CH1 CH0 Initial value 00010000 Read/Write R/W R/W R/W — R/W R/W R/W R/W AMR is an 8-bit read/write register for specifying the A/D conversion speed, external trigger option, and the analog input pins. Upon reset, AMR is initialized to H'10. |
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