HD64F2144B datasheet(17/546 Pages) RENESAS

17 / 546 page

Rev. 1.00 Jun.24, 2005 Page xvii of xxxii

Section 15 RAM ..................................................................................................353

Section 16 ROM ..................................................................................................355

16.1

Features.............................................................................................................................. 355

16.2

Mode Transitions ............................................................................................................... 357

16.3

Block Configuration........................................................................................................... 360

16.3.1 Block Configuration ............................................................................................. 360

16.4

Input/Output Pins ...............................................................................................................361

16.5

Register Descriptions ......................................................................................................... 361

16.5.1 Flash Memory Control Register 1 (FLMCR1)...................................................... 362

16.5.2 Flash Memory Control Register 2 (FLMCR2)...................................................... 363

16.5.3 Erase Block Registers 1 and 2 (EBR1, EBR2) ..................................................... 364

16.6

Operating Modes................................................................................................................ 365

16.7

On-Board Programming Modes......................................................................................... 366

16.7.1 Boot Mode ............................................................................................................ 366

16.7.2 User Program Mode.............................................................................................. 370

16.8

Flash Memory Programming/Erasing ................................................................................ 371

16.8.1 Programming/Programming-Verifying................................................................. 371

16.8.2 Erasing/Erasing-Verifying .................................................................................... 374

16.9

Programming/Eraseing Protection ..................................................................................... 376

16.9.1 Hardware Protection ............................................................................................. 376

16.9.2 Software Protection............................................................................................... 376

16.9.3 Error Protection..................................................................................................... 376

16.10 Interrupts during Flash Memory Programming/Erasing .................................................... 377

16.11 Programmer Mode ............................................................................................................. 378

16.12 Usage Notes ....................................................................................................................... 378

Section 17 Clock Pulse Generator .......................................................................381

17.1

Oscillator............................................................................................................................ 382

17.1.1 Connecting Crystal Resonator .............................................................................. 382

17.1.2 External Clock Input Method................................................................................ 383

17.2

Duty Correction Circuit ..................................................................................................... 386

17.3

Medium-Speed Clock Divider ........................................................................................... 386

17.4

Bus Master Clock Select Circuit ........................................................................................ 386

17.5

Subclock Input Circuit ....................................................................................................... 386

17.6

Subclock Waveform Forming Circuit................................................................................ 387

17.7

Clock Select Circuit ........................................................................................................... 387

17.8

Usage Notes ....................................................................................................................... 388

17.8.1 Note on Resonator ................................................................................................ 388

17.8.2 Notes on Board Design ......................................................................................... 388

HD64F2144B Datasheet(PDF) 17 Page - Renesas Technology Corp

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