| Electronic Components Datasheet Search |
|
MPC8641DEC Datasheet(PDF) 89 Page - Freescale Semiconductor, Inc |
|
|
|||||||||||||||||||||||||||||
MPC8641DEC Datasheet(HTML) 89 Page - Freescale Semiconductor, Inc |
|
89 / 140 page ![]() MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 1 Freescale Semiconductor 89 Serial RapidIO Figure 56. Receiver Input Compliance Mask Table 62. Receiver Input Compliance Mask Parameters Exclusive of Sinusoidal Jitter 15.9 Measurement and Test Requirements Since the LP-Serial electrical specification are guided by the XAUI electrical interface specified in Clause 47 of IEEE 802.3ae-2002, the measurement and test requirements defined here are similarly guided by Clause 47. In addition, the CJPAT test pattern defined in Annex 48A of IEEE802.3ae-2002 is specified as the test pattern for use in eye pattern and jitter measurements. Annex 48B of IEEE802.3ae-2002 is recommended as a reference for additional information on jitter test methods. Receiver Type VDIFFmin (mV) VDIFFmax (mV) A (UI) B (UI) 1.25 GBaud 100 800 0.275 0.400 2.5 GBaud 100 800 0.275 0.400 3.125 GBaud 100 800 0.275 0.400 1 0 VDIFF max -VDIFF max VDIFF min -VDIFF min Time (UI) 0 AB 1-B 1-A |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |