PCM3168APAP datasheet(59/66 Pages) TI

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DESIGN AND LAYOUT CONSIDERATIONS

Power-Supply Pins (VCCAD1/2, VCCDA1/2, and VDD1/2)

Grounding (AGNDAD1/2, AGNDDA1/2, and DGND1/2)

VIN1±, VIN2±, VIN3±, VIN4±, VIN5±, and VIN6± Pins

VCOMAD and VCOMDA Pins

VREFAD1/2 Pins

VOUT1±, VOU2±, VOUT3±, VOUT4±, VOUT5±, VOUT6±, VOU7±, and VOUT8± Pins

PCM3168A

PCM3168A-Q1

www.ti.com ......................................................................................................................................................................................... SBAS452 – SEPTEMBER 2008

The digital and analog power-supply pins of the PCM3168A and PCM3168A-Q1 should be bypassed to the

corresponding ground pins with 1-

µF ceramic capacitors placed as close to the pins as possible. Each

power-supply line (VCC, VDD) to the PCM3168A and PCM3168A-Q1 should be bypassed to the corresponding

ground pins with 10-

µF electrolytic capacitors to maximize the dynamic performance of the ADC and DAC.

Although the PCM3168A and PCM3168A-Q1 have two power lines to maximize the potential of dynamic

performance, using one common source (for instance, a +5-V power supply for VCC and a +3.3-V power supply

for VDD generated from one common source) is recommended to avoid unexpected power-supply trouble such

as latch-up or incorrect power-supply conditions. Also, simultaneous power-on/off of VCC and VDD is

recommended to avoid unexpected transient responses in outputs, though the power-supply sequence of VCC

and VDD is not specified in the operation and absolute maximum ratings point of view.

To maximize the dynamic performance of the PCM3168A and PCM3168A-Q1, the analog and digital grounds

are not connected internally. These pins should have very low impedances to avoid digital noise and signal

components feeding back into the analog ground. All ground pins should be connected directly to each other

under the part, and the device should be connected to the analog ground of the application, as with acceptable

analog layout practices; this layout reduces the potential of noise problems.

In case of direct interface to VINx±, 1-

µF electrolytic capacitors are recommended because the ac-coupling

capacitor (which gives a 2-Hz HPF corner frequency and 47

Ω and 0.1

µF to 470 Ω and 0.001 µF differential

LPF) is recommended as the anti-aliasing filter that gives a 160-kHz LPF corner frequency. If signal source

impedance is not enough (too low) or input line length to the VINx± is not enough (too short), insertion of an

analog front-end buffer (see Figure 59 to Figure 61) is recommended to maximize the dynamic performance. The

voltage coefficient of the capacitor for an anti-aliasing filter should be considered to maximize the THD

performance. A film-type capacitor is recommended; if a ceramic capacitor is used, a relatively higher voltage

type is recommended.

There are three ways to terminate any unused input pins. First, terminate these pins to AGNDAD with 0.001-

µF

to 1-

µF capacitors. This termination is applied on unused pins whose channels are configured in single-ended

mode. The second form of termination is to connect the positive (+) pin and negative (–) pins together and

terminating these to AGNDAD with 0.001-

µF to 1-µF capacitors. This option applies to unused pins with channels

that are configured in differential mode. The last termination method is to terminat the pins directly to VCOMAD;

this option can be applied on unused pins with unused channels combined into two channels that are then

configured in power-save mode.

10-

µF electrolytic capacitors are recommended between VCOMAD and AGNDAD, and VCOMDA and AGNDDA

to ensure a low source impedance of ADC and DAC common voltages. These capacitors should be located as

close to each pin as possible to reduce dynamic errors on the ADC and DAC common voltages.

10-

µF electrolytic capacitors are recommended between VREFAD1/2 and AGNDAD to ensure low source

impedances of ADC references. These capacitors should be located as close to each pin as possible to reduce

dynamic errors on ADC references.

The differential to single-ended buffer with post LPF can be directly connected (without capacitors) to these

output pins (see Figure 63), thereby minimizing the use of coupling capacitors for the 2-VRMS outputs. The op

amp and resistors should be determined with consideration of degrading some performance through this

differential to single-ended and LPF buffer; there is about 1.5-dB degradation seen in the examples of Figure 62

and Figure 63.

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PCM3168APAP Datasheet(PDF) 59 Page - Texas Instruments

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