Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

CS42L55 Datasheet(PDF) 29 Page - Cirrus Logic

Part # CS42L55
Description  Ultra Low Power, Stereo CODEC w/Class H Headphone Amp
PDF  73 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS42L55 Datasheet(HTML) 29 Page - Cirrus Logic

Back Button CS42L55 Datasheet HTML 25Page - Cirrus Logic CS42L55 Datasheet HTML 26Page - Cirrus Logic CS42L55 Datasheet HTML 27Page - Cirrus Logic CS42L55 Datasheet HTML 28Page - Cirrus Logic CS42L55 Datasheet HTML 29Page - Cirrus Logic CS42L55 Datasheet HTML 30Page - Cirrus Logic CS42L55 Datasheet HTML 31Page - Cirrus Logic CS42L55 Datasheet HTML 32Page - Cirrus Logic CS42L55 Datasheet HTML 33Page - Cirrus Logic Next Button
Zoom Inzoom in Zoom Outzoom out
 29 / 73 page
background image
DS773F1
29
CS42L55
4.5.1.3
Adapted to Output Signal (Mode 11)
When the Adaptive Power bits are set to 11, the CS42L55 decides which of the two sets of rail voltages
to send to the amplifiers based solely upon the level of the signal being sent to the amplifiers. If the signal
that is sent to the amplifiers would cause the amplifiers to clip when operating on the lower set of rail volt-
ages, the control logic instructs the charge pump to provide the higher set of rail voltages (±VCP) to the
amplifiers. If the signal that is sent to the amplifiers would not cause the amplifiers to clip when operating
on the lower set of rail voltages, the control logic instructs the charge pump to provide the lower set of rail
voltages (±VCP/2) to the amplifiers. This mode of operation eliminates the need to advise the CS42L55
of volume settings external to the device.
Note:
Signal detection is made using digital circuitry. This mode should, therefore, not be used with an-
alog passthrough (PGA to HP/Line).
4.5.2
Power Supply Transitions
Charge pump transitions from the lower set of rail voltages to the higher set of rail voltages occur on the
next FLYN/P clock cycle. Despite the fast response time of the system, the capacitive elements on the
VHPFILT pins prevent the rail voltages from changing instantaneously. Instead, the rail voltages ramp up
from ±VCP/2 to ±VCP based on the time constant created by the output impedance of the charge pump
and the capacitor on the VHPFILT pin (the transition time is approximately 20 µs). This behavior is de-
tailed in Figure 15. During this charging transition, a high dv/dt transient on the inputs may briefly clip the
outputs before the rail voltages charge to the full ±VCP level. This transitory clipping has been found to
be inaudible in listening tests.
Referenced Control
Register Location
HPxVOL[7:0] .......................
LINExVOL[7:0] ....................
MSTxVOL[7:0].....................
MSTxMUTE .........................
AMIXxVOL[6:0]....................
PMIXxVOL[6:0]....................
AINADV[7:0] ........................
DINADV[7:0]........................
BOOSTx ..............................
ADCxMUX ...........................
PGAxVOL ............................
ADCxMUTE .........................
ADCxSWP ...........................
PCMxSWP ..........................
HPxMUX..............................
LINExMUX...........................
HPxMUTE ...........................
LINExMUTE ........................
PDN_HPx ............................
PDN_LINEx .........................
TREB...................................
BASS...................................
TCEN...................................
BEEP...................................
BPVOL ................................
ADCB=A ..............................
PGAB=A ..............................
PLYBCKB=A........................
“Headphone Volume Control” on page 57
“Line Volume Control” on page 58
“Master Volume Control” on page 57
“Master Playback Mute” on page 51
“ADC Mixer Channel x Volume” on page 51
“PCM Mixer Channel x Volume” on page 52
“Analog Input Advisory Volume” on page 59
“Digital Input Advisory Volume” on page 59
“Boostx” on page 49
“ADC x Input Select” on page 46
“PGAx Volume” on page 49
“ADC Mute” on page 48
“ADC Mix Channel Swap” on page 60
“PCM Mix Channel Swap” on page 60
“Headphone Input Select” on page 47
“Line Input Select” on page 47
“Headphone Channel x Mute” on page 57
“Line Channel x Mute” on page 58
“Headphone Power Control” on page 43
“Line Power Control” on page 43
“Treble Gain” on page 56
“Bass Gain” on page 56
“Tone Control Enable” on page 56
“Beep Configuration” on page 55
“Beep Volume” on page 55
“ADC Channel B=A” on page 48
“PGA Channel B=A” on page 48
“Playback Channels B=A” on page 50



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com