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LT1937 Datasheet(PDF) 7 Page - Linear Technology |
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LT1937 Datasheet(HTML) 7 Page - Linear Technology |
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7 / 12 page ![]() 7 LT1937 1937f APPLICATIO S I FOR ATIO 2. Using a DC Voltage For some applications, the preferred method of brightness control is a variable DC voltage to adjust the LED current. The dimming control using a DC voltage is shown in Figure 7. As the DC voltage increases, the voltage drop on R2 increases and the voltage drop on R1 decreases. Thus, the LED current decreases. The selection of R2 and R3 will make the current from the variable DC source much smaller than the LED current and much larger than the FB pin bias current. For VDC range from 0V to 2V, the selection of resistors in Figure 7 gives dimming control of LED current from 0mA to 15mA. 3. Using a Filtered PWM Signal The filtered PWM signal can be considered as an adjust- able DC voltage. It can be used to replace the variable DC voltage source in dimming control. The circuit is shown in Figure 8. Figure 7. Dimming Control Using a DC Voltage Figure 8. Dimming Control Using a Filtered PWM Signal Figure 9. Dimming Control Using a Logic Signal VIN = 3.6V 50 µs/DIV 1937 F09 THREE LEDs 15mA FB 100mV/DIV SHDN 2V/DIV IIN 100mA/DIV Figure 10. Start-Up Waveforms Without Soft-Startup Circuit 4. Using a Logic Signal For applications that need to adjust the LED current in discrete steps, a logic signal can be used as shown in Figure 9. R1 sets the minimum LED current (when the NMOS is off). RINC sets how much the LED current increases when the NMOS is turned on. The selection of R1 and RINC follows formula (1) and Table 4. Start-up and Inrush Current To achieve minimum start-up delay, no internal soft-start circuit is included in LT1937. When first turned on without an external soft-start circuit, inrush current is about 200mA as shown in Figure 10. If soft-start is desired, the recom- mended circuit and the waveforms are shown in Figure 11. If both soft-start and dimming are used, a 10kHz PWM signal on SHDN is not recommended. Use a lower fre- quency or implement dimming through the FB pin as shown in Figures 7, 8 or 9. VDC R2 5k R1 6.3 Ω 1937 F07 R3 90k LT1937 FB PWM R2 5k R1 6.3 Ω 0.1 µF 1937 F08 R3 90k 10k LT1937 FB LOGIC SIGNAL 2N7002 R1 1937 F09 RINC LT1937 FB |
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