TC7129CPL datasheet(11/15 Pages) TELCOM

11 / 15 page

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TELCOM SEMICONDUCTOR, INC.

INTEGRATE

DEINTEGRATE

TIME

CLOCK PULSES

OVERSHOOT DUE TO ZERO CROSSING

BETWEEN CLOCK PULSES

INTEGRATOR RESIDUE VOLTAGE

OVERSHOOT CAUSED BY

COMPARATOR DELAY OF

1 CLOCK PULSE

Figure 10.

Accuracy Errors in Dual-Slope Conversion

Figure 11. Integrator Waveform

INT1

INTEGRATE

DE1

DEINTEGRATE

REST X10

ZERO

INTEGRATE

AND LATCH

DE2 REST X10

DE3

ZERO INTEGRATE

INTEGRATOR

RESIDUAL VOLTAGE

TC7129

NOTE: Shaded area greatly expanded

in time and amplitude.

Inside the TC7129

Figure 12 shows a simplified block diagram of the

TC7129.

Integrator Section

The integrator section includes the integrator, compara-

tor, input buffer amplifier, and analog switches used to

change the circuit configuration during the separate mea-

surement phases described earlier.

Digital Auto-Zeroing

To eliminate the effect of amplifier offset errors, the

TC7129 uses a digital auto-zeroing technique. After the

input voltage is measured as described above, the mea-

surement is repeated with the inputs shorted internally. The

reading with inputs shorted is a measurement of the internal

errors and is subtracted from the previous reading to obtain

a corrected measurement. Digital auto-zeroing eliminates

the need for an external auto-zeroing capacitor used in other

ADCs.

TC7129

4-1/2 DIGIT ANALOG-TO-DIGITAL

CONVERTER WITH ON-CHIP LCD DRIVERS

TC7129CPL Datasheet(PDF) 11 Page - TelCom Semiconductor, Inc

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