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EX128-CS100 Datasheet(PDF) 29 Page - Actel Corporation

Part # EX128-CS100
Description  eX Family FPGAs
PDF  49 Pages
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Manufacturer  ACTEL [Actel Corporation]
Direct Link  http://www.actel.com
Logo ACTEL - Actel Corporation

EX128-CS100 Datasheet(HTML) 29 Page - Actel Corporation

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eX Family FPGAs
v4.3
1-25
Table 1-20 • eX Family Timing Characteristics
(Worst-Case Commercial Conditions VCCA = 2.3 V, TJ = 70°C)
‘–P’ Speed
‘Std’ Speed
‘–F’ Speed
Parameter
Description
Min.
Max.
Min.
Max.
Min.
Max.
Units
2.5 V LVCMOS Output Module Timing1 (VCCI = 2.3 V)
tDLH
Data-to-Pad LOW to HIGH
3.3
4.7
6.6
ns
tDHL
Data-to-Pad HIGH to LOW
3.5
5.0
7.0
ns
tDHLS
Data-to-Pad HIGH to LOW—Low Slew
11.6
16.6
23.2
ns
tENZL
Enable-to-Pad, Z to L
2.5
3.6
5.1
ns
tENZLS
Enable-to-Pad Z to L—Low Slew
11.8
16.9
23.7
ns
tENZH
Enable-to-Pad, Z to H
3.4
4.9
6.9
ns
tENLZ
Enable-to-Pad, L to Z
2.1
3.0
4.2
ns
tENHZ
Enable-to-Pad, H to Z
2.4
5.67
7.94
ns
dTLH
Delta Delay vs. Load LOW to HIGH
0.034
0.046
0.066
ns/pF
dTHL
Delta Delay vs. Load HIGH to LOW
0.016
0.022
0.05
ns/pF
dTHLS
Delta Delay vs. Load HIGH to LOW—Low Slew
0.05
0.072
0.1
ns/pF
3.3 V LVTTL Output Module Timing1 (VCCI = 3.0 V)
tDLH
Data-to-Pad LOW to HIGH
2.8
4.0
5.6
ns
tDHL
Data-to-Pad HIGH to LOW
2.7
3.9
5.4
ns
tDHLS
Data-to-Pad HIGH to LOW—Low Slew
9.7
13.9
19.5
ns
tENZL
Enable-to-Pad, Z to L
2.2
3.2
4.4
ns
tENZLS
Enable-to-Pad Z to L—Low Slew
9.7
13.9
19.6
ns
tENZH
Enable-to-Pad, Z to H
2.8
4.0
5.6
ns
tENLZ
Enable-to-Pad, L to Z
2.8
4.0
5.6
ns
tENHZ
Enable-to-Pad, H to Z
2.6
3.8
5.3
ns
dTLH
Delta Delay vs. Load LOW to HIGH
0.02
0.03
0.046
ns/pF
dTHL
Delta Delay vs. Load HIGH to LOW
0.016
0.022
0.05
ns/pF
dTHLS
Delta Delay vs. Load HIGH to LOW—Low Slew
0.05
0.072
0.1
ns/pF
5.0 V TTL Output Module Timing* (VCCI = 4.75 V)
tDLH
Data-to-Pad LOW to HIGH
2.0
2.9
4.0
ns
tDHL
Data-to-Pad HIGH to LOW
2.6
3.7
5.2
ns
tDHLS
Data-to-Pad HIGH to LOW—Low Slew
6.8
9.7
13.6
ns
tENZL
Enable-to-Pad, Z to L
1.9
2.7
3.8
ns
tENZLS
Enable-to-Pad Z to L—Low Slew
6.8
9.8
13.7
ns
tENZH
Enable-to-Pad, Z to H
2.1
3.0
4.1
ns
tENLZ
Enable-to-Pad, L to Z
3.3
4.8
6.6
ns
Note: *Delays based on 35 pF loading.



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