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EX128-CS100PP Datasheet(PDF) 23 Page - Actel Corporation |
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EX128-CS100PP Datasheet(HTML) 23 Page - Actel Corporation |
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23 / 49 page  eX Family FPGAs v4.3 1-19 Output Buffer Delays AC Test Loads Table 1-13 • Output Buffer Delays D To AC test loads (shownbelow) PAD E TRIBUFF In GND 50% Out 1.5 V 50% 1.5 V En GND 50% Out 1.5 V 50% 10% En GND 50% Out GND 1.5 V 50% 90% VOL VCC VOH tDLH tDHL VOL VCC VCC tENZL tENLZ VCC VOH tENZH tENHZ Figure 1-15 • AC Test Loads R to VCC for tPZL R to GND for tPHZ R = 1 k Ω R to VCC for tPLZ R to GND for tPHZ R = 1 k Ω GND 35 pF GND 35pF 5pF To the output under test To the output under test To the output under test Load 1 (used to measure propagation delay) Load 2 (Used to measure enable delays) Load 3 (Used to measure disable delays) VCC VCC |
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