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LTC4308 Datasheet(PDF) 3 Page - Linear Technology |
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LTC4308 Datasheet(HTML) 3 Page - Linear Technology |
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3 / 16 page  LTC4308 3 4308f SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS tIDLE Bus Idle Time l 55 95 175 μs VTHR_EN ENABLE Threshold Voltage ENABLE Rising Edge l 0.45 0.6 0.75 V VTHR_EN(HYST) ENABLE Threshold Voltage Hysteresis (Note 3) 35 mV IENABLE ENABLE Input Current ENABLE from 0V to VCC l 0.1 ±5 μA tPLH_EN ENABLE Delay Off-On (Figure 1) 95 μs tPHL_EN ENABLE Delay On-Off (Note 3), (Figure 1) 10 ns tPLH_READY READY Delay Off-On (Note 3), (Figure 1) 10 ns tPHL_READY READY Delay On-Off (Note 3), (Figure 1) 10 ns VOL_READY READY Output Low Voltage IREADY = 3mA, VCC = 2.3V l 0.4 V IOFF_READY READY Off Leakage Current VCC = READY = 5.5V l 0.1 ±5 μA Prop Delay and Rise-Time Accelerators tPHL SDA/SCL Propagation Delay High to Low CLOAD = 50pF, 2.7k to VCC on SDA, SCL, (Notes 2, 3), (Figure 1) 70 ns tPLH SDA/SCL Propagation Delay Low to High CLOAD = 50pF, 2.7k to VCC on SDA, SCL, (Notes 2, 3), (Figure 1) 10 ns tRISE SDA/SCL Transition Time Low to High CLOAD = 100pF, 10k to VCC on SDA, SCL, (Notes 3, 4), (Figure 1) 30 300 ns tFALL SDA/SCL Transition Time High to Low CLOAD = 100pF, 10k to VCC on SDA, SCL, (Notes 3, 4), (Figure 1) 30 300 ns IPULLUPAC Transient Boosted Pull-Up Current Positive Transition > 0.8V/μs on SDAOUT, SCLOUT (Note 5) 58 mA Input-Output Connection VOS Input to Output Offset Voltage (OUT – IN) 2.7k to VCC on SDAOUT, SCLOUT, SDAIN = SCLIN = 0.2V l 250 300 380 mV 2.7k to VCC on SDAOUT, SCLOUT, SDAIN = SCLIN = 0.4V, VCC = 5.5V l 250 350 450 mV Output to Input Offset Voltage (IN – OUT) 2.7k to VCC on SDAIN, SCLIN, SDAOUT = SCLOUT = 0.4V l –150 –200 –300 mV 2.7k to VCC on SDAIN, SCLIN, SDAOUT = SCLOUT = 0.4V, VCC = 5.5V l –150 –250 –350 mV VTHR SDAOUT, SCLOUT Logic Input Threshold Voltage VCC ≥ 2.9V VCC < 2.9V 1.4 1.1 1.65 1.35 1.9 1.6 V V SDAIN, SCLIN Logic Input Threshold Voltage SDAIN, SCLIN Rising Edge, VCC = 2.3V, 5.5V 0.45 0.6 0.75 V VTHR(HYST) SDAOUT, SCLOUT Logic Input Threshold Voltage Hysteresis (Note 3) 50 mV SDAIN, SCLIN Logic Input Threshold Voltage Hysteresis (Note 3) 35 mV CIN Digital Input Capacitance SDAIN, SDAOUT, SCLIN, SCLOUT (Note 3) 10 pF ILEAK Input Leakage Current SDA, SCL Pins l ±5 μA VOL Output Low Voltage SDAOUT, SCLOUT Pins, ISINK = 4mA, SDAIN = SCLIN = 0V, VCC = 2.7V l 0 400 mV 2.7k to VCC on SDAOUT, SCLOUT, SDAIN = SCLIN = 0V l 250 300 380 mV VILMAX Buffer Input Logic Low Voltage SDAOUT, SCLOUT Pins l 1.2 V The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 3.3V, unless otherwise noted. ELECTRICAL CHARACTERISTICS |
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