LTC2483 datasheet(18/32 Pages) LINER

18 / 32 page

LTC2483

2483f

input signal with better than 1ppm accuracy if the sampling

period is at least 14 times greater than the input circuit time

constant

τ. The sampling process on the four input analog

pins is quasi-independent so each time constant should be

considered by itself and, under worst-case circumstances,

the errors may add.

When using the internal oscillator, the LTC2483’s front-

end switched-capacitor network is clocked at 123kHz

corresponding to an 8.1

µs sampling period. Thus, for

settling errors of less than 1ppm, the driving source

impedance should be chosen such that

τ ≤ 8.1µs/14 =

580ns. When an external oscillator of frequency fEOSC is

used, the sampling period is 2.5/fEOSC and, for a settling

error of less than 1ppm,

τ ≤ 0.178/fEOSC.

Automatic Differential Input Current Cancellation

In applications where the sensor output impedance is low

(up to 10k

Ω with no external bypass capacitor or up to

500

Ω with 0.001µF bypass), complete settling of the input

occurs. In this case, no errors are introduced and direct

digitization of the sensor is possible.

For many applications, the sensor output impedance com-

bined with external bypass capacitors produces RC time

constants much greater than the 580ns required for 1ppm

accuracy. For example, a 10k

Ω bridge driving a 0.1µF

bypass capacitor has a time constant an order of magni-

tude greater than the required maximum. Historically,

settling issues were solved using buffers. These buffers

led to increased noise, reduced DC performance (Offset/

Drift), limited input/output swing (cannot digitize signals

near ground or VCC), added system cost and increased

power. The LTC2483 uses a proprietary switching algo-

rithm that forces the average differential input current to

zero independent of external settling errors. This allows

accurate direct digitization of high impedance sensors

without the need of buffers (see Figures 8 to 10). Addi-

tional errors resulting from mismatched leakage currents

must also be taken into account.

The switching algorithm forces the average input current

on the positive input (IIN+) to be equal to the average input

current on the negative input (IIN–). Over the complete

conversion cycle, the average differential input current

(IIN+ – IIN–) is zero. While the differential input current is

APPLICATIO S I FOR ATIO

CEXT

2483 F08

VINCM + 0.5VIN

RSOURCE

IN+

LTC2483

CPAR

≅20pF

CEXT

VINCM – 0.5VIN

RSOURCE

IN –

CPAR

≅20pF

Figure 8. An RC Network at IN+ and IN–

RSOURCE (Ω)

–20

100k

2483 F09

–40

–60

–80

100

10k

VCC = 5V

VREF = 5V

VIN

+ = 3.75V

VIN

– = 1.25V

TA = 25°C

CEXT = 0pF

CEXT = 100pF

CEXT = 1nF, 0.1µF, 1µF

Figure 9. +FS Error vs RSOURCE at IN+ and IN–

RSOURCE (Ω)

–20

100k

2483 F10

–40

–60

–80

100

10k

VCC = 5V

VREF = 5V

VIN

+ = 1.25V

VIN

– = 3.75V

TA = 25°C

CEXT = 0pF

CEXT = 100pF

CEXT = 1nF, 0.1µF, 1µF

Figure 10. –FS Error vs RSOURCE at IN

+ and IN–

LTC2483 Datasheet(PDF) 18 Page - Linear Technology

LTC2483 Datasheet(HTML) 18 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

Datasheet Download

Link URL