SN28837

1/2-INCH PAL TIMER

SOCS031B – JULY 1991

15

POST OFFICE BOX 655303

VD

GP

PI

PS,T

GT

ABIN

BCP1, BCP2

Mode

Operation

(see Note B)

302 Pulses

(see Note A)

290 Pulses

Clear

Operation

Normal Operation

NOTES: A. When VD is low and GP goes low, 290 pulses are generated for PI, PS, and T after VD goes high.

B. When VD is high, GP goes low and 302 pulses are generated for PI, PS and T.

C. GPS is at a steady-state low level.

Figure 11. Normal Timing and Variable Integration

H Counter

n

n+1

n+2

m

m+1

m+2

m+3

6

7

n+3

CLK

T1 = 299 ns

89

n+4

m

m+1

m+2

m+3

6

7

8

9

HCR

(see Note A)

H Counter(T1)

CBLK

HCR

(see Note B)

Reset Window

NOTES: A. The H counter is preset to the value 6 when HCR changes from low to high.

B. Output signals are changed one T1 clock after the change of the counter through the output latches.

Figure 12. Operation of HCR