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SN74ACT7811FN Datasheet(PDF) 11 Page - Texas Instruments

Part # SN74ACT7811FN
Description  1024 횞 18 CLOCKED FIRST-IN, FIRST-OUT MEMORY
PDF  17 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

SN74ACT7811FN Datasheet(HTML) 11 Page - Texas Instruments

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SN74ACT7811
1024
× 18
CLOCKED FIRST-IN, FIRST-OUT MEMORY
SCAS151C – JANUARY 1991 – REVISED FEBRUARY 1996
11
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
timing requirements (see Figures 1 through 8)
′ACT7811-15
′ACT7811-18
′ACT7811-20
′ACT7811-25
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
UNIT
fclock
Clock frequency
40
35
28.5
16.7
MHz
D0 – D17 high or low
10
12
14
20
WRTCLK high
7
8.5
10
17
WRTCLK low
10
11
14
23
RDCLK high
7
8.5
10
17
tw
Pulse duration
RDCLK low
10
11
14
23
ns
tw
Pulse duration
DAF high
10
10
10
10
ns
WRTEN1, WRTEN2
high or low
10
10
10
10
OE, RDEN1, RDEN2
high or low
10
10
10
10
D0 – D17 before WRTCLK
↑
5
5
5
5
WRTEN1, WRTEN2 high
before WRTCLK
↑
5
5
5
5
OE, RDEN1, RDEN2 high
before RDCLK
↑
5
5
5
5
tsu
Setup time
Reset: RESET low before first
WRTCLK and RDCLK
↑
7
7
7
7
ns
Define AF/AE: D0 – D8 before
DAF
↓
5
5
5
5
Define AF/AE: DAF
↓ before
RESET
↑
7
7
7
7
Define AF/AE (default):
DAF high before RESET
↑
5
5
5
5
D0 – D17 after WRTCLK
↑
1
1
1
1
WRTEN1, WRTEN2 high after
WRTCLK
↑
1
1
1
1
OE, RDEN1, RDEN2 high after
RDCLK
↑
1
1
1
1
th
Hold time
Reset: RESET low after fourth
WRTCLK and RDCLK
↑
0
0
0
0
ns
Define AF/AE: D0 – D8 after
DAF
↓
1
1
1
1
Define AF/AE: DAF low after
RESET
↑
0
0
0
0
Define AF/AE (default):
DAF high after RESET
↑
1
1
1
1
† To permit the clock pulse to be utilized for reset purposes



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