SN74ACT7811

1024

× 18

CLOCKED FIRST-IN, FIRST-OUT MEMORY

SCAS151C – JANUARY 1991 – REVISED FEBRUARY 1996

15

POST OFFICE BOX 655303

APPLICATION INFORMATION

expanding the SN74ACT7811

The SN74ACT7811 is expandable in width and depth. Expanding in word depth offers special timing

considerations:

After the first data word is loaded into the FIFO, the word is unloaded and the output-ready flag (OR) output

goes high after (N

× 3) read-clock (RDCLK) cycles, where N is the number of devices used in depth

expansion.

After the FIFO is filled, the input-ready flag (IR) output goes low, the first word is unloaded, and the IR flag

output is driven high after (N

× 2) write-clock cycles, where N is the number of devices used in depth

expansion.

WRTCLK

WRTEN1

WRTEN2

IR

WRTCLK

WRTEN1

WRTEN2

IR

D0 – D17

D0 – D17

RDCLK

OR

RDEN1

RDEN2

OE

WRTCLK

WRTEN1

WRTEN2

IR

D0 – D17

RDCLK

OE

Q0 – Q17

Q0 – Q17

5 V

RDCLK

RDEN1

RDEN1

RDEN2

OR

RDEN2

OR

OE

Q0 – Q17

CLOCK

SN74ACT7811

SN74ACT7811

Figure 7. Word-Depth Expansion: 2048 Words

× 18 Bits, N = 2

WRTCLK

WRTEN1

WRTEN2

IR

D0 – D17

RDCLK

OE

Q0 – Q17

RDEN1

RDEN2

OR

WRTCLK

WRTEN1

WRTEN2

IR

D0 – D17

RDCLK

OE

Q0 – Q17

RDEN1

RDEN2

OR

WRTCLK

WRTEN

D18 – D35

IR

D0 – D17

RDCLK

RDEN

Q18 – Q35

OR

Q0 – Q17

OE

SN74ACT7811

SN74ACT7811

Figure 8. Word-Width Expansion: 1024 Words

× 36 Bits