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TLC7225C Datasheet(PDF) 14 Page - Texas Instruments |
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TLC7225C Datasheet(HTML) 14 Page - Texas Instruments |
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14 / 21 page ![]() TLC7225C, TLC7225I QUADRUPLE 8-BIT DIGITAL-TO-ANALOG CONVERTERS SLAS109B – OCTOBER 1996 – REVISED FEBRUARY 2001 14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 APPLICATION INFORMATION AGND bias for positive output offset The TLC7225 AGND terminal can be biased above or below the system ground terminal, DGND, to provide an offset-zero analog-output voltage level. Figure 10 shows a circuit configuration to achieve this for channel A of the TLC7225. The output voltage, VO at OUTA, can be expressed as: V O + V bias ) D A V I where DA is a fractional representation of the digital input word (0 ≤ D ≤ 255/256). _ + DAC A AGND DGND TLC7225† Vref VO(OUTA) 5 22 2 7 3 VDD 6 VSS VI Vbias † Digital inputs omitted for clarity. Figure 10. AGND Bias Circuit Increasing AGND above system ground reduces the output range. VDD – Vref must be at least 4 V to ensure specified operation. Since the AGND terminal is common to all four DACs, this method biases up the output voltages of all the DACs in the TLC7225. Supply voltages VDD and VSS for the TLC7225 should be referenced to DGND. |
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