SRT512_09 datasheet(15/46 Pages) STMICROELECTRONICS

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SRT512

Memory mapping

Doc ID 13277 Rev 4

15/46

4.1

EEPROM area

Blocks 0 to 4 define a User area. They behave as standard EEPROM blocks, like blocks 7 to

15 as described in Figure 13. Each block can be individually write-protected using the

OTP_Lock_Reg bits of the system area. Once a block has been protected, it can no longer

be unprotected.

Figure 13.

Lockable EEPROM area (addresses 0 to 4)

4.2

32-bit binary counters

The two 32-bit binary counters located at block addresses 5 and 6, respectively, are used to

count down from 232 (4096 million) to 0. The SRT512 uses dedicated logic that only allows

the update of a counter if the new value is lower than the previous one. This feature allows

the application to count down by steps of 1 or more. The initial value is FFFF FFFEh in

counter 5 and, FFFF FFFFh in counter 6. When the value displayed is 0000 0000h, the

counter is empty and cannot be reloaded. The counter is updated by issuing the Write_block

command to block address 5 or 6, depending on which counter is to be updated. The

Write_block command writes the new 32-bit value to the counter block address. Figure 15

shows examples of how the counters operate.

The counter programming cycles are protected by automated antitearing logic. This function

allows the counter value to be protected in case of power down within the programming

cycle. In case of power down, the counter value is not updated and the previous value

continues to be stored.

Blocks 5 and 6 can be write-protected using the OTP_Lock_Reg bits (block 255). Once a

block has been protected, its contents cannot be modified. A protected counter block

behaves like a ROM block.

Figure 14.

Binary counter (addresses 5 to 6)

Block

address

MSb

b31

32-bit block

b16 b15 b14

b8 b7

LSb

Description

Lockable

EEPROM

User area

ai12382b

Block

address

MSb

32-bit block

LSb

Description

Count down

counter

32-bit binary counter

ai12384b

b31

b16 b15 b14

b8 b7

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