TMC2192 datasheet(26/69 Pages) CADEKA

26 / 69 page

TMC2192

PRODUCT SPECIFICATION

REV. 1.0.0 8/13/03

Analog outputs of the TMC2192 are driven by three 10 bit

D/A converters, operating at twice the pixel rate. The outputs

drive standard video levels into 37.5 or 75 Ohm loads. An

internal voltage reference is used to provide reference cur-

rent for the D/A converters. For more accurate levels, an

external ﬁxed or variable voltage reference source is accom-

modated. The video signal levels from the TMC2192 may be

adjusted by varying the common Vref or the 3 independent

Rrefs. Each video D/A converter has an independent refer-

ence resistor that can adjust the output gain. D/A Matching

is achieved by trimming the each external reference resistor

of each D/A.

Digital Composite Output

In addition, the TMC2192 supplies a 10 bit digital composite

signal on pins D[7:0] and FLD[2:1]. The digital composite

output can be either an interpolated signal on a non-interpo-

lated signal, this controlled by the control register

SEL_CLK.

Ancillary Data

Control Registers for this section

The TMC2192 is designed to accept 15 words of ancillary

data after the active video pixels at the end of each horizontal

line. Ancillary data may occur once per line, once per ﬁeld,

once per eight ﬁelds, on random lines, or not al all. The

TMC2192 does not assume ancillary data is present on a reg-

ular basis.

Note:

1. P = odd parity bit, x = reserved bit will be ignored

The ﬁrst three words of ancillary data comprise the TRS sig-

nal (ANC2-0) which indicates the end of active video. Also

known as the Ancillary data header, the TRS signal is a 00h,

FFh, FFh sequence. Except for the TRS words, ancillary data

bit 0 (B0, LSB) is odd parity for B7-1.

The data type word (TT) is used to specify the ancillary data

type. The TMC2192 compares this 7 bit value with the con-

tents of the ANCID control register. If there is a match, the

ancillary data will be processed. If there is no match, the

TMC2192 ignores ancillary data.

The word count data (D11-0 in MM, LL) in the ancillary data

packet indicate the number of words in ancillary data.

Ancillary phase data is used to program the MSBs of the

PHASE register. ANCPHEN and PHV determine how ancil-

lary phase data is used. When ancillary data is not present,

the TMC2192 assumes PHV = LOW.

Address

Bit(s)

Name

0x07

ANCFREN

0x07

ANCPHEN

0x07

ANCTREN

0x08

7-0

ANCID

Table 14. Ancillary Data Format

Word ID

Description

ANC2

Ancillary Data Header (Timing

Reference Signal)

00000000

ANC1

11111111

ANC0

11111111

Data Type

TT6

TT5

TT4

TT3

TT2

TT1

TT0

Word

D11

D10

Count

FIELD

Field ID/Synchronous Video Flag

SVF

reserved

xxxxxxx

PH1

Subcarrier Phase

PHV

PH12

PH11

PH10

PH9

PH8

PH7

PH0

PH6

PH5

PH4

PH3

PH2

PH1

PH0

FR4

Subcarrier Frequency

FRV

FR31

FR30

FR29

FR28

FR3

FR27

FR26

FR25

FR24

FR23

FR22

FR21

FR2

FR20

FR19

FR18

FR17

FR16

FR15

FR14

FR1

FR13

FR12

FR11

FR10

FR9

FR8

FR7

FR0

FR6

FR5

FR4

FR3

FR2

FR1

FR0

TMC2192 Datasheet(PDF) 26 Page - Cadeka Microcircuits LLC.

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