ADCLK854

Rev. 0 | Page 7 of 16

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

1

2

3

4

5

6

7

8

9

10

11

12

CLK0

CLK0

GND

CLK1

CLK1

OUT11 (OUT11B)

OUT11 (OUT11A)

IN_SEL

CTRL_A

CTRL_B

NC

OUT4 (OUT4A)

OUT4 (OUT4B)

OUT5 (OUT5A)

OUT5 (OUT5B)

GND

OUT6 (OUT6A)

OUT6 (OUT6B)

OUT7 (OUT7A)

OUT7 (OUT7B)

35

NC

36

34

33

32

31

30

29

28

27

26

25

ADCLK854

TOP VIEW

(Not to Scale)

PIN 1

INDICATOR

NOTES:

1. NC = NO CONNECT.

2. EXPOSED PADDLE MUST BE CONNECTED TO GND.

Figure 2. Pin Configuration

Table 7. Pin Function Descriptions

Pin No.

Mnemonic

Description

1

Reference Voltage.

2

CLK0

Input (Negative) 0.

3

CLK0

Input (Positive) 0.

7, 18, 24, 30,

37, 43

Supply Voltage.

5

CLK1

Input (Negative) 1.

6

CLK1

Input (Positive) 1.

8

OUT11 (OUT11B)

Complementary Side of Differential LVDS Output 11, or CMOS Output 11 on Channel B.

9

OUT11 (OUT11A)

True Side of Differential LVDS Output 11, or CMOS Output 11 on Channel A.

10

IN_SEL

Input Select. (0 = CLK0, CLK0; 1 = CLK1, CLK1). CMOS logic input with 200 kΩ pull-down resistor.

11

CTRL_A

Control for Output 3 to Output 0 (0 = LVDS, 1 = CMOS). CMOS logic input with 200 kΩ pull-down resistor.

12

CTRL_B

Control for Output 7 to Output 4 (0 = LVDS, 1 = CMOS). CMOS logic input with 200 kΩ pull-down resistor.

13

CTRL_C

Control for Output 11 to Output 8 (0 = LVDS, 1 = CMOS). CMOS logic input with 200 kΩ pull-down resistor.

14

SLEEP

Sleep Mode Control (0 = normal operation, 1 = sleep). CMOS logic input with 200 kΩ pull down resistor.

15

OUT10 (OUT10B)

Complementary Side of Differential LVDS Output 10, or CMOS Output 10 on Channel B.

16

OUT10 (OUT10A)

True Side of Differential LVDS Output 10, or CMOS Output 10 on Channel A.

4, 17, 23, 29,

38, 44

GND

Ground Pin.

19

OUT9 (OUT9B)

Complementary Side of Differential LVDS Output 9, or CMOS Output 9 on Channel B.

20

OUT9 (OUT9A)

True Side of Differential LVDS Output 9, or CMOS Output 9 on Channel A.

21

OUT8 (OUT8B)

Complementary Side of Differential LVDS Output 8, or CMOS Output 8 on Channel B.

22

OUT8 (OUT8A)

True Side of Differential LVDS Output 8, or CMOS Output 8 on Channel A.

25

OUT7 (OUT7B)

Complementary Side of Differential LVDS Output 7, or CMOS Output 7 on Channel B.