SMM665C datasheet(14/36 Pages) SUMMIT

14 / 36 page

SMM665C

Summit Microelectronics, Inc

2125 3.1 7/22/2008

APPLICATIONS INFORMATION (CONTINUED)

A pulse of current, either sourced or sunk for 5µs

every 1.7ms, to the capacitors connected to the

TRIM_CAPX pins adjusts the voltage output on the

TRIMX pins. The voltages on the TRIM_CAPX pins are

buffered and applied to the TRIMX pins. The voltage

adjustments on the TRIMX pins cause a slight ripple of

less than 1mV on the power supply voltages. The

amplitude of this ripple is a function of the TRIM_CAP

capacitor and the trim gain of the converter.

Application Note 37 details the calculation of the

TRIM_CAP capacitor to achieve a desired minimum

ripple.

Each channel can be programmed to either enable or

disable the Active DC Control function.

When

disabled or not active, the TRIMX pins on the

SMM665C are high impedance inputs. If disabled and

not used, they can be connected to ground. The

voltages on the TRIMX pins are buffered and applied

to the TRIM_CAPX pins charging the capacitors. This

allows a smooth transition from the converter powering

up to its nominal voltage; to the SMM665C controlling

that voltage, and to the Active DC Control nominal

setting.

The pulse of current can be increased to a 10X pulse

of current until the power supply voltages are at their

nominal settings by selecting the programmable

Speed-Up Convergence option. As the name implies,

this option decreases the time required to bring a

supply voltage from the converter’s nominal output

voltage to the Active DC Control nominal voltage

setting.

POWER-ON CASCADE SEQUENCING

The SMM665C can be programmed to sequence up to

six power supplies in any order. Each of these six

channels (A-F) has an associated open drain PUP

output that, when connected to a converter’s enable

pin, controls the turn-on of the converter.

The

channels

are

assigned

sequence

positions

determine the order of the sequence. Any channel

can also be programmed to not take part in the

sequencing in applications with fewer than six

supplies. The polarity of each of the PUPX outputs is

programmable

for

use

with

various

types

converters.

Power-on sequencing can be initiated by the

PWR_ON/OFF pin or via I

2C control. The polarity of

the PWR_ON/OFF pin is programmable. If hard wired

in its active state the SMM665C will automatically

initiate the Power-on sequence. Otherwise, toggling

the PWR_ON/OFF pin to its active state will initiate the

Power-on sequence. To enable software control of

the sequencing feature, the SMM665C offers an I

command to initiate Power-on sequencing while the

PWR_ON/OFF pin is in its inactive state.

The SMM665C can be programmed to wait until either

or both VDD and 12VIN inputs are within their

respective voltage threshold limits before Power-on

sequencing is allowed to begin. This ensures that the

converters have their full supply voltage before they

are enabled.

Once Power-on sequencing begins, the SMM665C will

wait a Power-on delay time (tDPON) for any channel in

the first sequence position (0) and then activate the

PUPX outputs for those channels.

The Power-on

delay times are individually programmable for each

channel. The SMM665C will then wait until all VMX

inputs of the channels assigned to the first sequence

position (0) are above their programmed UV1

thresholds which is called cascade sequencing. At

this point, the SMM665C will enter the second

sequence position (1) and begin to timeout the Power-

on delay times for the associated channels.

This

process continues until all of channels in the sequence

have turned on and are above their UV1 threshold.

The status registers indicates that all sequenced

power supply channels have turned on. Once these

channels are above their UV1 thresholds, the

SMM665C will begin the Active DC Control of the

enabled channels. The Power-on sequencing mode

ends when the Active DC Controlled channels are at

their nominal voltage setting. The “Ready” bit in the

status registers signifies that the voltages are at their

set points.

The programmable sequence termination timer can be

used to protect against a stalled Power-on sequence.

This timer resets itself at the beginning of each

sequence position.

All channels in the sequence

position must go above their UV1 threshold before the

sequence termination timer times out (tSTT) or the

sequence will terminate and all PUPX outputs will be

switched to their inactive state. The status registers

contain bits that indicate the sequence has been

terminated and in which sequence position the timer

timed out. This timer has four settings of OFF, 100ms,

200ms and 400ms.

SMM665C Datasheet(PDF) 14 Page - Summit Microelectronics, Inc.

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