SMM665C datasheet(16/36 Pages) SUMMIT

16 / 36 page

SMM665C

Summit Microelectronics, Inc

2125 3.1 7/22/2008

APPLICATIONS INFORMATION (CONTINUED)

TEMPERATURE SENSOR ACCURACY

The internal temperature sensor accuracy is ±5

oC from

-40 to +90

oC. The sensor measures the temperature

of the SMM665C die and the ambient temperature. If

VDD is at 5V, the die temperature is +2

oC and at 12V,

it is +4

oC. In order to calculate this difference in

specific applications measure the Vdd or 12VIN supply

current and calculate the power dissipated and

multiply by 80

oC/W. For instance, 5V and 5mA is

25mW, which creates a 2

oC offset.

Note: For hex files (configuration settings) that

indicate no use of the temperature sensor, only the

typical temperature sensor accuracy is valid.

MARGINING

The SMM665C has two additional Active DC Output

Control voltage settings for channels A-F; margin high

and margin low. The margin high and margin low

voltage settings can range from 0.3V to VDD of the

converters’ nominal output voltage depending on the

specified margin range of the DC-DC converter.

These settings are stored in the configuration registers

and are loaded into the Active DC Control voltage

setting by margin commands issued via the I

2C bus.

The channel must be enabled for Active DC Control in

order to enable margining.

The margin command

registers contain two bits for each channel that decode

the commands to margin high, margin low, or control

to the nominal setting. Therefore, any combination of

margin high, margin low, and nominal control is

allowed in the margining mode.

Once the SMM665C receives the command to margin

the supply voltages, it begins adjusting the supply

voltages to move toward the desired setting. When all

channels are at their voltage setting, a bit is set in the

margin status registers.

Note: Configuration writes or reads of registers 00HEX

to 0FHEX should not be performed while the SMM665C

is margining.

POWER-OFF CASCADE SEQUENCING

The SMM665C can be programmed to perform Power-

off sequencing in either the same order or reverse

order of Power-on cascade sequencing.

Power-off cascade sequencing can be initiated by the

PWR_ON/OFF pin, via I

2C control or triggered by a

fault condition on any of the monitored inputs.

Toggling the PWR_ON/OFF pin to its inactive state will

initiate the Power-off sequence.

enable

software

control

the

Power-off

sequencing feature, the SMM665C offers an I

command to initiate Power-off sequencing regardless

of the state of the PWR_ON/OFF pin. Furthermore,

Power-off sequencing can be initiated by a fault

condition on a monitored input.

Once Power-off sequencing begins, the SMM665C will

wait a Power-off delay time (tDPOFF) for any channel in

the last sequence position (reverse order) and then

deactivate the PUP outputs for those channels. The

Power-off delay times are individually programmable

for each channel. The SMM665C will then wait until

all VMX inputs of the channels assigned to that

sequence position are below the programmed OFF

thresholds.

At this point, the SMM665C will decrement to the next

sequence position and begin to timeout the Power-off

delay times for the associated channels. This process

continues until all of channels in the sequence have

turned off and are below their OFF thresholds. The

status register reveals that all sequenced channels

have turned off.

The Power-off sequencing mode

ends when all sequenced supplies are below their

OFF thresholds.

The programmable sequence termination timer can be

used to protect against a stalled Power-off sequence.

This timer resets itself at the beginning of each

sequence position.

All channels in the sequence

position must go below their OFF threshold before the

sequence termination timer times out (tSTT) or the

sequence will terminate and all PUP outputs will be

switched to their inactive state. This timer has four

settings of OFF, 100ms, 200ms and 400ms.

The

sequence termination timer can be disabled separately

for Power-off sequencing.

While the SMM665C is in the Power-off sequencing

mode the RST output is held active and the HEALTHY

output is held inactive regardless of trigger sources

(Figure 8). The Force Shutdown trigger option is also

disabled while in this mode.

Furthermore, the

SMM665C will not respond to activity on the

PWR_ON/OFF pin or to a Power-on I

2C command

during Power-off sequencing mode.

SMM665C Datasheet(PDF) 16 Page - Summit Microelectronics, Inc.

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