ST7263BHX datasheet(76/186 Pages) STMICROELECTRONICS

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On-chip peripherals

ST7263Bxx

76/186

Doc ID 7516 Rev 8

Input Capture 1 High register (IC1HR)

Reset value: Undefined

This is an 8-bit read only register that contains the high part of the counter value (transferred

by the input capture 1 event).

Input Capture 1 Low register (IC1LR)

Reset value: Undefined

This is an 8-bit read only register that contains the low part of the counter value (transferred

by the input capture 1 event).

Output Compare 1 High register (OC1HR)

Reset value: 1000 0000 (80h)

This is an 8-bit register that contains the high part of the value to be compared to the CHR

Output Compare 1 Low register (OC1LR)

Reset value: 0000 0000 (00h)

This is an 8-bit register that contains the low part of the value to be compared to the CLR

3 OCF2 output Compare Flag 2.

0: No match (reset value).

1: The content of the free running counter has matched the content of the OC2R

the OC2R (OC2LR) register.

2 TIMD Timer disable.

This bit is set and cleared by software. When set, it freezes the timer prescaler and

counter and disabled the output functions (OCMP1 and OCMP2 pins) to reduce

power consumption. Access to the timer registers is still available, allowing the

timer configuration to be changed, or the counter reset, while it is disabled.

0: Timer enabled

1: Timer prescaler, counter and outputs disabled

[1:0] Reserved, must be kept cleared.

MSB

LSB

Read only

MSB

LSB

Read only

MSB

LSB

Read/write

ST7263BHx Datasheet(PDF) 76 Page - STMicroelectronics