ST7263BHX datasheet(41/186 Pages) STMICROELECTRONICS

41 / 186 page

ST7263Bxx

Power saving modes

Doc ID 7516 Rev 8

41/186

Figure 20.

Halt mode flowchart

Before servicing an interrupt, the CC register is pushed on the stack. The I-Bit is set during the interrupt

routine and cleared when the CC register is popped.

8.3

Slow mode

In Slow mode, the oscillator frequency can be divided by 2 as selected by the SMS bit in the

Miscellaneous register. The CPU and peripherals are clocked at this lower frequency. Slow

mode is used to reduce power consumption, and enables the user to adapt the clock

frequency to the available supply voltage.

8.4

Wait mode

Wait mode places the MCU in a low power consumption mode by stopping the CPU.

This power saving mode is selected by calling the “WFI” ST7 software instruction.

All peripherals remain active. During Wait mode, the I bit of the CC register is forced to 0 to

enable all interrupts. All other registers and memory remain unchanged. The MCU remains

in Wait mode until an interrupt or Reset occurs, whereupon the Program Counter branches

to the starting address of the interrupt or Reset service routine.

EXTERNAL

INTERRUPT*

RESET

HALT INSTRUCTION

4096 CPU CLOCK

FETCH RESET VECTOR

OR SERVICE INTERRUPT

CYCLES DELAY

CPU CLOCK

OSCILLATOR

PERIPH. CLOCK

I-BIT

SET

CPU CLOCK

OSCILLATOR

PERIPH. CLOCK

I-BIT

OFF

CLEARED

OFF

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