STM32F101V8 datasheet(80/81 Pages) STMICROELECTRONICS

80 / 81 page

Revision history

STM32F101x8, STM32F101xB

80/81

Doc ID 13586 Rev 12

21-Apr-2009

I/O information clarified on page 1. Figure 7: Memory map modified.

In Table 4: Medium-density STM32F101xx pin definitions: PB4, PB13,

PB14, PB15, PB3/TRACESWO moved from Default column to Remap

column.

Note modified in Table 12: Maximum current consumption in Run mode,

code with data processing running from Flash and Table 14: Maximum

current consumption in Sleep mode, code running from Flash or RAM.

Figure 15, Figure 16 and Figure 17 show typical curves.

Table 19: High-speed external user clock characteristics and Table 20:

Low-speed external user clock characteristics modified.

ACCHSI max values modified in Table 23: HSI oscillator characteristics.

Small text changes.

22-Sep-2009

Note 5 updated and Note 4 added in Table 4: Medium-density

STM32F101xx pin definitions.

VRERINT and TCoeff added to Table 11: Embedded internal reference

voltage. Typical IDD_VBAT value added in Table 15: Typical and maximum

current consumptions in Stop and Standby modes. Figure 14: Typical

current consumption on VBAT with RTC on versus temperature at

different VBAT values added.

fHSE_ext min modified in Table 19: High-speed external user clock

characteristics.

CL1 and CL2 replaced by C in Table 21: HSE 4-16 MHz oscillator

characteristics and Table 22: LSE oscillator characteristics (fLSE =

32.768 kHz), notes modified and moved below the tables.

Table 23: HSI oscillator characteristics modified. Conditions removed

from Table 25: Low-power mode wakeup timings.

Figure 23: Recommended NRST pin protection modified.

Note 1 modified below Figure 20: Typical application with an 8 MHz

crystal.

Figure 23: Recommended NRST pin protection modified.

IEC 1000 standard updated to IEC 61000 and SAE J1752/3 updated to

IEC 61967-2 in Section 5.3.10: EMC characteristics on page 50.

Jitter added to Table 26: PLL characteristics. CADC and RAIN parameters

modified in Table 41: ADC characteristics. RAIN max values modified in

Table 42: RAIN max for fADC = 14 MHz.

Small text changes.

Table 52.

Document revision history (continued)

Date

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STM32F101V8 Datasheet(PDF) 80 Page - STMicroelectronics

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