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25LC040A Datasheet(PDF) 8 Page - Microchip Technology

Part # 25LC040A
Description  1K-4K SPI Serial EEPROM High Temp Family Data Sheet
PDF  24 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

25LC040A Datasheet(HTML) 8 Page - Microchip Technology

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25LCXXXA
DS22136B-page 8
Preliminary
© 2009 Microchip Technology Inc.
3.0
FUNCTIONAL DESCRIPTION
3.1
Principles of Operation
The 25LCXXXA are low-density serial EEPROMs
designed to interface directly with the Serial Peripheral
Interface (SPI) port of many of today’s popular micro-
controller families, including Microchip’s PIC® micro-
controllers. It may also interface with microcontrollers
that do not have a built-in SPI port by using discrete I/
O lines programmed properly in firmware to match the
SPI protocol.
The 25LCXXXA contains an 8-bit instruction register.
The device is accessed via the SI pin, with data being
clocked in on the rising edge of SCK. The CS pin must
be low and the HOLD pin must be high for the entire
operation.
Table 3-1 contains a list of the possible instruction
bytes and format for device operation. All instructions,
addresses, and data are transferred MSB first, LSB
last.
Data (SI) is sampled on the first rising edge of SCK
after CS goes low. If the clock line is shared with other
peripheral devices on the SPI bus, the user can assert
the HOLD input and place the 25LCXXXA in ‘HOLD’
mode. After releasing the HOLD pin, operation will
resume from the point when the HOLD was asserted.
BLOCK DIAGRAM
TABLE 3-1:
INSTRUCTION SET
SI
SO
SCK
CS
HOLD
WP
STATUS
Register
I/O Control
Memory
Control
Logic
X
Dec
HV Generator
EEPROM
Array
Page Latches
Y Decoder
Sense Amp.
R/W Control
Logic
VCC
VSS
Instruction Name
Instruction Format
Description
READ
0000 A8011
Read data from memory array beginning at selected address
WRITE
0000 A8010
Write data to memory array beginning at selected address
WRDI
0000 x100
Reset the write enable latch (disable write operations)
WREN
0000 x110
Set the write enable latch (enable write operations)
RDSR
0000 x101
Read STATUS register
WRSR
0000 x001
Write STATUS register
Note:
For the 24LC040A device, A8 is the 9
th address bit, which is used to address the entire 512 byte array.
For the 24LC020A and 24LC010A devcies, A8 is a don’t care.
x
= don’t care.



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