ATtiny261A datasheet(73/292 Pages) ATMEL

73 / 292 page

8197A–AVR–10/09

ATtiny261A/461A/861A

internal clock source, selected by the Clock Select bits (CS02:0). When no clock source is

selected (CS02:0 = 0) the timer is stopped. However, the TCNT0 value can be accessed by the

CPU, regardless of whether clkT0 is present or not. A CPU write overrides (has priority over) all

counter clear or count operations. The Timer/Counter Overflow Flag (TOV0) is set when the

counter reaches the maximum value and it can be used for generating a CPU interrupt.

11.5 Input Capture Unit

The Timer/Counter incorporates an Input Capture unit that can capture external events and give

them a time-stamp indicating time of occurrence. The external signal indicating an event, or mul-

tiple events, can be applied via the ICP0 pin or alternatively, via the analog-comparator unit. The

time-stamps can then be used to calculate frequency, duty-cycle, and other features of the sig-

nal applied. Alternatively the time-stamps can be used for creating a log of the events.

The Input Capture unit is illustrated by the block diagram shown in Figure 11-4. The elements of

the block diagram that are not directly a part of the Input Capture unit are gray shaded.

Figure 11-4. Input Capture Unit Block Diagram

The Output Compare Register OCR0A is a dual-purpose register that is also used as an 8-bit

Input Capture Register ICR0. In 16-bit Input Capture mode the Output Compare Register

OCR0B serves as the high byte of the Input Capture Register ICR0. In 8-bit Input Capture mode

the Output Compare Register OCR0B is free to be used as a normal Output Compare Register,

but in 16-bit Input Capture mode the Output Compare Unit cannot be used as there are no free

Output Compare Register(s). Even though the Input Capture register is called ICR0 in this sec-

tion, it is refering to the Output Compare Register(s).

When a change of the logic level (an event) occurs on the Input Capture pin (ICP0), alternatively

on the Analog Comparator output (ACO), and this change confirms to the setting of the edge

detector, a capture will be triggered. When a capture is triggered, the value of the counter

(TCNT0) is written to the Input Capture Register (ICR0). The Input Capture Flag (ICF0) is set at

ICF0 (Int.Req.)

Analog

Comparator

WRITE

ICR0 (16-bit Register)

OCR0B (8-bit)

Noise

Canceler

ICP0

Edge

Detector

TEMP (8-bit)

DATA BUS (8-bit)

OCR0A (8-bit)

TCNT0 (16-bit Counter)

TCNT0H (8-bit)

TCNT0L (8-bit)

ACIC0*

ICNC0

ICES0

ACO*

ATtiny261A Datasheet(PDF) 73 Page - ATMEL Corporation

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