Analog Integrated Circuit Device Data

Freescale Semiconductor

19

34844

FUNCTIONAL DEVICE OPERATION

I2C BUS SPECIFICATION

During manual mode, all internal Registers are in Default

Configuration, refer Table 6, under this configuration the PIN

and NIN pins are enabled to scale the current capability per

string and may be disable by setting 2.2 V in the

corresponding terminal.

Also in this mode, the device can be enabled as follows:

+ EN pin + PWM signal (Two Signals): In this

configuration, the PWM signal applied to PWM pin will be in

charge of controlling the LED dimming and a second signal

will enable or disable the chip through the EN pin. Figure 20

+ PWM Signal tied to SDA pin (Just ONE signal): In this

configuration the PWM pin should be tied to SDA pin. The

PWM signal applied to PWM pin will be in charge of

controlling LED dimming and enable the device every time

the PWM is active. For this configuration EN pin should be

LOW.

POWER DOWN MODE

If the input voltage falls below the UVLO threshold, the

device enters automatically into power down mode. When in

power down, the supply current is reduced below 2.0

μA

interface is enabled.

I2C BUS SPECIFICATION

MC34844 is a unidirectional device that can only be written by an external control unit. Since the device is a 7 bit address

device (1110110), the control unit needs to follow a specific data transfer format which is shown below.

Figure 7. A complete data transfer

For a complete data transfer, please use this format in the

following order:

1. START condition

2. MC34844 device address and Write instruction (R/W =

0)

3. First data pack, it corresponds to the MC34844

Register that needs to be written. (refer to Table 5)

4. Second data pack, it corresponds to the value that

should be written to that register. (refer to Table 5)

5. STOP condition

I2C variables description:

• START: this condition occurs when SDA changes from

HIGH to LOW while SCK is HIGH.

• ACKNOWLEDGE: The acknowledge clock pulse is

generated by the Master (Control Unit).

• The transmitter releases the SDA line (HIGH) during the

acknowledge clock pulse.

The receiver (MC34844) must pull down the SDA line

during this acknowledge pulse to indicate that the data

was correctly written.

• Bits in the first byte: The first seven bits of the first bite

make up the slave address. The eighth bit is the LSB (least

significant bit), which determines the direction of the

message (Write = 0)

For the MC34844 device, when an address is sent, each

of the devices in a system compares the first seven bits

after the START condition with its address. If they match,

the device considers itself addressed by the control unit as

a slave-receiver.

• STOP: this condition occurs when SDA changes from

LOW to HIGH while SCK is HIGH

For more information about “I2C BUS SPECIFICATION”

please refer to the following link:

http://www.nxp.com/acrobat_download/literature/

9398/39340011.pdf