AS3525 datasheet(190/194 Pages) AMSCO

190 / 194 page

AS3525-A/-B C22O22

Data Sheet, Confidential

www.austriamicrosystems.com

Revision 1.13

190

- 194

8.4.1.7

D IO ST PU LSR

8.4.1.8

D IO ST PD LSR

Figure 71 Digital Schmitt Trigger Input with Pull-Up and Limited

Slew Rate Output

PAD

Schmitt

Figure 72 Digital Schmitt Trigger Input with Pull-Down and Limited

Slew Rate Output

PAD

Schmitt

8.4.1.9

D OUT LSR LV

8.4.1.10 D IO ST PD LSR LV

Figure 73 Digital Output with Limited Slew Rate (low voltage)

PAD

Figure 74 Digital Schmitt Trigger Input with Pull-Down and Limited

Slew Rate Output (low voltage)

PAD

Schmitt

Appendix

9.1

Memory MAP

ARM922T provides 32-bit address to access the peripherals and memory. With this 32-bit address ARM922T can access up to 4 Giga Bytes of

memory. Cocoa does not use the complete 4 GB address space.

Address 0x0000_0000 is mapped to internal ROM or External Memory interface based on the boot ROM selection by the external input pin

(Port C, xpc[0] = intBootSel) Pin intBootSel=1 at startup selects the internal ROM, intBootSel = 0 selects the external memory.

The address range starting at 0x0000_0000 is also mapped to internal RAM upon setting of the remap bit. This remap allows the user to select

either RAM or ROM at 0x0000_0000.

Table 163 Address Map

S.No

Start (Base)

Address

End Address

Actual

Block Size

Peripheral

Comment

AHB Blocks

0x0000_0000

0x0001_FFFF

128 KByte

Internal ROM

Remap = 0 and

IntBootSel = 1

0x0000_0000

0x003F_FFFF

4 MB

External Memory IF

(MPMC Bank1 – Ext

Flash or Ext ROM)

Remap = 0 and

IntBootSel = 0

0x0000_0000

0x0004_FFFF

320 KByte

Embedded 1T-RAM

Remap = 1

0x0100_0000

0x0FFF_FFFF

Reserved

0x1000_0000

0x103F_FFFF

4 MB

External Memory IF

(MPMC Bank1 – Ext

Flash or Ext ROM)

Aliased

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