WM8144 datasheet(12/27 Pages) WOLFSON

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WM8144-10

Wolfson Microelectronics

For a white pixel:

VRS = VCL

VVS = VCL - 1.6

For the white pixel, using the same offset DAC value, the

ADC input can be expressed as:

When the VMID is 2.5V, the ADC input voltage becomes

1.7 volts which will result in a code of 102(dec). This is

near the ideal full-scale of 000(dec).

Therefore the output codes from the ADC are between

921(dec) and 102(dec), which implies that the ADC input

has been set up to maximise the dynamic range avail-

able. If a digital representation of the ADC output with a

black level near 000(dec) and a white level near 1023(dec)

is required then the INVOP control bit should now be set

to ONE.

Theory of Operation (Contd)

= 1*(V

- V

) + (1 - 2*0) *

+ V

ADC

MID

= 0 +

* V

+ V

ADC

MID

* V

ADC

MID

164

VMID

337

255

= 1*(V

- 1.6 - V

) + (1 - 2*0) *

+ V

ADC

MID

= -1.6 +

* V

+ V

ADC

MID

* V

- 1.6

ADC

MID

164

VMID

337

255

Example of Gain and Offset Operation

Input Video polarity

negative

Input sampling

CDS

Input voltage amplitude (VVS - VRS)

1.6V

Programmable gain

Clamping

Yes, VCL = 3.5V

After the input capacitor the input to the WM8144-10 can

be represented as:

Vrs

Vvs

Figure 7

For a black pixel:

VRS = VCL

VVS = VCL

Assuming that the offset DAC is set to 00dec:

() (

)

VADC = 1* Vcl - Vcl

VADC

0 + 0 + VMID

VADC = VMID

+−









120

255

VMID

An input voltage of VMID corresponds to a code of 512(dec)

from the ADC.

To maximise the dynamic range of the ADC input it is

necessary to program the offset DAC code to move the

ADC code corresponding to the black level towards code

1024(dec).

Hence set the offset DAC to 164(dec) with the sign bit not

set.

When the VMID is 2.5v, the ADC input voltage becomes

3.3 volts which will result in an ADC code of 921(dec).

This is near the ideal full-scale of 1023(dec).

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