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09HSI-S043-R0-CHT Datasheet(PDF) 35 Page - Hirose Electric |
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09HSI-S043-R0-CHT Datasheet(HTML) 35 Page - Hirose Electric |
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35 / 71 page  Signal Integrity Report – IT3 (25mm) Page 35 Figure 59 TDR and TDT waveforms @120ps rise time (20% to 80%) and 2.625GHz BW for pair 4 of IT3-25mm for 50% pin density configuration 20% TO 80% RISE TIME (PS) WORST PAIR-TO-PAIR NEXT (%) WORST PAIR-TO-PAIR FEXT (%) 30 0.081 0.150 60 0.048 0.085 120 0.024 0.043 Table 9 Summary of Time-domain SDD for pair 4 of IT3-25mm for 50% pin density configuration 3.2.4 Time-Domain Crosstalk (connector only) The total differential cross-talk values in % for at 60ps (20% to 80%) rise time and 5.25GHz bandwidth for center pair 8 of the fully populated model and, pair 4 for 60% and 50% pin density are shown in Figure 60, Figure 61 and Figure 62. The outer column (top row as portrait in Figure 60) exhibits higher crosstalk as it is only surrounded by one ground plane. 3.2.4.1 Fully populated pin assignment Figure 60 Differential cross-talk (in %) from simulations for center pair 8 and step input @ 60ps (20% to 80%) rise time and 5.25GHz BW |
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