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SC68C652B Datasheet(PDF) 3 Page - NXP Semiconductors |
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SC68C652B Datasheet(HTML) 3 Page - NXP Semiconductors |
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3 / 43 page  SC68C652B_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 2 November 2009 3 of 43 NXP Semiconductors SC68C652B Dual UART with 32-byte FIFOs and IrDA encoder/decoder 4. Block diagram Fig 1. Block diagram of SC68C652B TXA, TXB RXA, RXB SC68C652B XTAL2 XTAL1 D0 to D7 R/W RESET 002aab323 DATA BUS AND CONTROL LOGIC REGISTER SELECT LOGIC A0 to A3 CS INTERRUPT CONTROL LOGIC IRQ TXRDYA, TXRDYB RXRDYA, RXRDYB CLOCK AND BAUD RATE GENERATOR MODEM CONTROL LOGIC DTRA, DTRB RTSA, RTSB OP2A, OP2B CTSA, CTSB RIA, RIB CDA, CDB DSRA, DSRB RECEIVE SHIFT REGISTER RECEIVE FIFO REGISTER FLOW CONTROL LOGIC FLOW CONTROL LOGIC TRANSMIT SHIFT REGISTER TRANSMIT FIFO REGISTER IR DECODER IR ENCODER |
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