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PIC24F04KA201 Datasheet(PDF) 118 Page - Microchip Technology |
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PIC24F04KA201 Datasheet(HTML) 118 Page - Microchip Technology |
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118 / 224 page  PIC24F04KA201 FAMILY DS39937B-page 116 Preliminary © 2009 Microchip Technology Inc. REGISTER 14-2: PADCFG1: PAD CONFIGURATION CONTROL REGISTER U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0 — — — — — — — — bit 15 bit 8 U-0 U-0 U-0 R/W-0 R/W-0 U-0 U-0 R/W-0 — — — SMBUSDEL(2) OC1TRIS(1) — — — bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 15-5 Unimplemented: Read as ‘0’ bit 3 OC1TRIS: OC1 Output Tri-State Select bit(1) 1 = OC1 output will not be active on the pin; OCPWM1 can still be used for internal triggers 0 = OC1 output will be active on the pin based on the OCPWM1 module settings bit 2-0 Unimplemented: Read as ‘0’ Note 1: To enable the actual OC1 output, the OCPWM1 module has to be enabled. 2: Bit 4 is described in Section 16.0 “Inter-Integrated Circuit (I2C™)”. |
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